r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 767

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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15.3.8
SCBRR is an 8-bit register that, together with the baud rate generator clock source selected by the
CKS[1:0] bits in the serial mode register (SCSMR), determines the serial transmit/receive bit rate.
The CPU can always read and write to SCBRR. SCBRR is initialized to H'FF by a power-on reset.
Each channel has independent baud rate generator control, so different values can be set in three
channels.
The SCBRR setting is calculated as follows:
• Asynchronous mode:
• Clocked synchronous mode:
B: Bit rate (bits/s)
N: SCBRR setting for baud rate generator (0 ≤ N ≤ 255)
Pφ: Operating frequency for peripheral modules (MHz)
n: Baud rate generator clock source (n = 0, 1, 2, 3) (for the clock sources and values of n,
(The setting must satisfy the electrical characteristics.)
see table 15.3.)
N =
N =
Bit Rate Register (SCBRR)
8 × 2
64 × 2
2n-1
2n-1
Initial value:
× B
× B
× 10
R/W:
Bit:
× 10
6
R/W
6
− 1
7
1
− 1
R/W
6
1
R/W
Section 15 Serial Communication Interface with FIFO (SCIF)
5
1
R/W
4
1
R/W
3
1
Rev. 2.00 Dec. 09, 2005 Page 743 of 1152
R/W
2
1
R/W
1
1
R/W
0
1
REJ09B0191-0200

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