r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 278

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 8 Bus State Controller (BSC)
8.4.4
SDCR specifies the method to refresh and access SDRAM, and the types of SDRAMs to be
connected.
SDCR is initialized to H'00000000 by a power-on reset and retains the value by a manual reset and
in software standby mode.
Initial value:
Initial value:
Rev. 2.00 Dec. 09, 2005 Page 254 of 1152
REJ09B0191-0200
Bit
31 to 21
20, 19
18
17, 16
R/W:
R/W:
Bit:
Bit:
SDRAM Control Register (SDCR)
Bit Name

A2ROW[1:0] 00

A2COL[1:0]
31
15
R
R
0
0
-
-
30
14
R
R
0
0
-
-
DEEP SLOW RFSH RMODEPDOWN BACTV
R/W
29
13
R
0
0
-
Initial
Value
All 0
0
00
R/W
28
12
R
0
0
-
R/W
27
11
R
0
0
R/W
R
R/W
R
R/W
-
R/W
26
10
R
0
0
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Number of Bits of Row Address for Area 2
Specify the number of bits of row address for area 2.
00: 11 bits
01: 12 bits
10: 13 bits
11: Reserved (setting prohibited)
Reserved
This bit is always read as 0. The write value should
always be 0.
Number of Bits of Column Address for Area 2
Specify the number of bits of column address for
area 2.
00: 8 bits
01: 9 bits
10: 10 bits
11: Reserved (setting prohibited)
R/W
25
R
0
9
0
-
R/W
24
R
0
8
0
-
23
R
R
0
7
0
-
-
22
R
R
0
6
0
-
-
21
R
R
0
5
0
-
-
R/W
R/W
A2ROW[1:0]
A3ROW[1:0]
20
0
4
0
R/W
R/W
19
0
3
0
18
R
R
0
2
0
-
-
R/W
R/W
A2COL[1:0]
A3COL[1:0]
17
0
1
0
R/W
R/W
16
0
0
0