MC68HC705BD3 FREESCALE [Freescale Semiconductor, Inc], MC68HC705BD3 Datasheet - Page 34

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MC68HC705BD3

Manufacturer Part Number
MC68HC705BD3
Description
High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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4
4.1.3
The MCU monitors all opcode fetches. If an illegal address space is accessed during an opcode
fetch, an internal reset is generated. Illegal address spaces consist of all unused locations within
the memory map and the I/O registers (see Figure 3-1). Because the internal reset signal is used,
the MCU comes out of an ILADR reset in the same operating mode it was in when the opcode was
fetched.
4.1.4
The MCU contains a watchdog timer that automatically times out if not reset (cleared) within a
specific amount of time by a program reset sequence.
4-2
INTERNAL
INTERNAL
ADDRESS
INTERNAL
XTAL PIN
CLOCK
RESET
BUS
DATA
BUS
NOTES:
1. XTAL is not meant to represent frequency. It is only used to represent time.
2. Internal clock, internal address bus, and internal data bus signals are not available externally.
3. Next rising edge of internal clock after rising edge of RESET initiates reset sequence.
VDD
2
2
2
1
Illegal Address (ILADR) Reset
Computer Operating Properly (COP) Reset
t
VDDR
VDD THRESHOLD (TYPICALLY 1-2V)
t
oxov
Figure 4-1 Power-On Reset and RESET Timing
RESETS AND INTERRUPTS
3FFE
NEW
PCL
t
3FFF
cyc
NEW
PCH
t
RL
4064 t
NEW PC
=1.5t
3
CODE
OP
cyc
CYC
3FFE
3FFE
PCH
3FFF
PCL
MC68HC05BD3
NEW PC
CODE
OP
TPG

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