MC68HC705P9CDW FREESCALE [Freescale Semiconductor, Inc], MC68HC705P9CDW Datasheet - Page 36

• Manufacturer Part Number: MC68HC705P9CDW
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Memory
3.5 RAM
Technical Data
36
$001D
$001E
$001F
$1FF0
$0900
Addr.
ADC Status/Control Register
NOTE:
Mask Option Register
Name
ADC Data Register
See page 136.
See page 134.
COP Register
See page 42.
See page 97.
Figure 3-2. I/O Register Summary (Sheet 4 of 4)
The 128 addresses from $0080–$00FF are RAM locations. The CPU
uses the top 64 RAM addresses, $00C0–$00FF, as the stack. Before
processing an interrupt, the CPU uses five bytes of the stack to save the
contents of the CPU registers. During a subroutine call, the CPU uses
two bytes of the stack to store the return address. The stack pointer
decrements when the CPU stores a byte on the stack and increments
when the CPU retrieves a byte from the stack.
Be careful when using nested subroutines or multiple interrupt levels.
The CPU may overwrite data in the RAM during a subroutine or during
the interrupt stacking operation.
Reserved Read:
(ADSCR)
(COPR)
(ADDR)
(MOR)
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Bit 7
CCF
Bit 7
R
R
0
0
Memory
= Unimplemented
ADRC
R
R
6
6
0
0
ADON
R
R
5
5
0
0
Unaffected by reset
Unaffected by reset
Unaffected by reset
R
R
4
4
0
0
0
R = Reserved
R
R
3
3
0
0
0
MC68HC705P9 — Rev. 4.0
SIOP
CH2
R
R
2
2
0
U = Unaffected
CH1
IRQ
R
R
1
1
0
MOTOROLA
COPC
COPE
Bit 0
Bit 0
CH0
R
0
0