NAND04GW3B2AN1F NUMONYX [Numonyx B.V], NAND04GW3B2AN1F Datasheet - Page 17

• Manufacturer Part Number: NAND04GW3B2AN1F
• Description: 4 Gbit, 8 Gbit, 2112 Byte/1056 Word Page 3V, NAND Flash Memories
• Manufacturer: NUMONYX [Numonyx B.V]

NAND04GW3B2B, NAND08GW3B2A
5
Table 7.
1. The bus cycles are only shown for issuing the codes. The cycles required to input the addresses or input/output data are
2. Only during Cache Read busy.
Read
Random Data Output
Cache Read
Exit Cache Read
Page Program
(Sequential Input default)
Random Data Input
Copy Back Program
Cache Program
Block Erase
Reset
Read Electronic Signature
Read Status Register
Read Block Lock Status
Blocks Unlock
Blocks Lock
Blocks Lock-Down
not shown.
Command
Command set
All bus write operations to the device are interpreted by the Command Interface. The
Commands are input on I/O0-I/O7 and are latched on the rising edge of Write Enable when
the Command Latch Enable signal is high. Device operations are selected by writing
specific commands to the Command Register. The two-step command sequences for
program and erase operations are imposed to maximize data security.
The Commands are summarized in
Commands
1
st
FFh
7Ah
2Ah
2Ch
00h
05h
00h
34h
80h
85h
00h
80h
60h
90h
70h
23h
cycle
Table
Bus Write Operations
2
nd
D0h
E0h
30h
31h
10h
35h
15h
24h
cycle
7.
–
–
–
–
–
–
–
–
3
rd
85h
cycle
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
(1)
4
th
10h
cycle
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Command set
during busy
Commands
accepted
Yes
Yes
Yes
(2)
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