HYB18T512160AF INFINEON [Infineon Technologies AG], HYB18T512160AF Datasheet - Page 18

• Manufacturer Part Number: HYB18T512160AF
• Description: 512-Mbit DDR2 SDRAM
• Manufacturer: INFINEON [Infineon Technologies AG]

Table 4
Ball#/Pin#
B3
Data Mask 16 organization
B3
F3
Power Supplies 4/ 8 16 organizations
A9,C1,C3,C7,
C9
A1
A7,B2,B8,D2,
D8
A3,E3
Power Supplies 4/ 8 organizations
E2
E1
E9,H9,L1
E7
J1,K9
Power Supplies 16 organization
J2
E9, G1, G3,
G7, G9
J1
E1, J9, M9, R1
E7, F2, F8, H2,
H8
J7
J3,N1,P9
Not Connected 4/ 8 organizations
G1, L3,L7, L8
Not Connected 4 organization
A2, B1, B9,
D1, D9
Data Sheet
Pin Configuration of DDR SDRAM
Name
DM
UDM
LDM
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
NC
NC
DDQ
DD
SSQ
SS
REF
DDL
DD
SSDL
SS
REF
DDQ
DDL
DD
SSQ
SSDL
SS
Pin
Type
I
I
I
PWR
PWR
PWR
PWR
AI
PWR
PWR
PWR
PWR
AI
PWR
PWR
PWR
PWR
PWR
PWR
NC
NC
Buffer
Type
SSTL
SSTL
SSTL
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Function
Data Mask
Note: DM is an input mask signal for write data. Input data is
Data Mask Upper Byte
Data Mask Lower Byte
I/O Driver Power Supply
Power Supply
Power Supply
Power Supply
I/O Reference Voltage
Power Supply
Power Supply
Power Supply
Power Supply
I/O Reference Voltage
I/O Driver Power Supply
Power Supply
Power Supply
Power Supply
Power Supply
Power Supply
Not Connected
Note: No internal electrical connection is present
Not Connected
masked when DM is sampled HIGH coincident with that
input data during a write access. DM is sampled on both
edges of DQS. Although DM pins are input only, the DM
loading matches the DQ and DQS loading. LDM and UDM
are the input mask signals for 16 components and control
the lower or upper bytes. For 8 components the data mask
function is disabled, when RDQS/RDQS are enabled by
EMRS(1) command.
18
HYB18T512[40/80/16]0AF–[3/3S/3.7/5]
Pin Configuration and Block Diagrams
512-Mbit DDR2 SDRAM
09112003-SDM9-IQ3P
Rev. 1.3, 2005-01