HYB18T512160AF INFINEON [Infineon Technologies AG], HYB18T512160AF Datasheet - Page 40

• Manufacturer Part Number: HYB18T512160AF
• Description: 512-Mbit DDR2 SDRAM
• Manufacturer: INFINEON [Infineon Technologies AG]

ODT Truth Tables
The ODT Truth Table shows which of the input pins are
terminated depending on the state of address bit A10
and A11 in the EMRS(1) for all three device
Table 15
Input Pin
x4 components
DQ[3:0]
DQS
DQS
DM
x8 components
DQ[7:0]
DQS
DQS
RDQS
RDQS
DM
x16 components
DQ[7:0]
DQ[15:8]
LDQS
LDQS
UDQS
UDQS
LDM
UDM
Note: X = don’t care; 0 = bit set to low; 1 = bit set to high
Data Sheet
ODT Truth Table
EMRS(1)
Address Bit A10
X
X
0
X
X
X
0
X
0
X
X
X
X
0
X
0
X
X
40
organisations ( 4, 8 and 16). To activate termination
of any of these pins, the ODT function has to be
enabled in the EMRS(1) by address bits A6 and A2.
HYB18T512[40/80/16]0AF–[3/3S/3.7/5]
EMRS(1)
Address Bit A11
X
X
1
1
0
X
X
512-Mbit DDR2 SDRAM
Functional Description
09112003-SDM9-IQ3P
Rev. 1.3, 2005-01