IBM25PPC440GP IBM Microelectronics, IBM25PPC440GP Datasheet - Page 44

• Manufacturer Part Number: IBM25PPC440GP
• Description: PowerPC 440GP Embedded Processor
• Manufacturer: IBM Microelectronics

Signal Functional Description
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to 3.3V, 10kΩ to 5V)
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to 3.3V)
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
Page 44 of 72
EMCRxD0:3,
EMC0RxD0:1,
EMC1RxD0:1,
EMC0RxD,
EMC1RxD
EMCRxDV,
EMC1CrSDV
EMCRxClk
EMCRxErr,
EMC0RxErr
EMCTxClk,
EMCRefClk
EMCTxD0:3,
EMC0TxD0:1,
EMC1TxD0:1,
EMC0TxD,
EMC1TxD
EMCTxEn,
EMC0TxEn,
EMCSync
EMCTxErr,
EMC1TxEn
External Slave Peripheral Interface
DMAAck0:3
DMAReq0:3
EOT0:3/TC0:3
PerAddr00:31
PerWBE0:3
PerBLast
PerCS0:7
Signal Name
MII: Receive data
RMII 0: Receive data
RMII 1: Receive data
SMII 0: Receive data
SMII 1: Receive data
MII: Receive data valid
RMII 1: Carrier sense data valid
MII: Receive clock
MII: Receive error
RMII 0: Receive error
MII: Transmit clock
RMII and SMII: Reference clock
MII: Transmit data
RMII 0: Transmit data
RMII 1: Transmit data
SMII 0: Transmit data
SMII 1: Transmit data
MII: Transmit data enabled
RMII 0: Transmit data enabled
SMII: Sync signal
MII: Transmit error:
RMII: Transmit data enabled
Used by the PPC440GP to indicate that data transfers
have occurred.
Used by slave peripherals to indicate they are prepared
to transfer data.
End Of Transfer/Terminal Count.
Peripheral address bus used by PPC440GP when not in
external master mode, otherwise used by external
master.
Note: PerAddr00 is the most significant bit (msb) on this
bus.
External peripheral data bus byte enables.
Used by either the peripheral controller, DMA controller,
or external master to indicates the last transfer of a
memory access.
External peripheral device select.
PowerPC 440GP Embedded Processor Data Sheet
(Part 3 of 7)
Description
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
I
I
I
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
Type
Notes
1, 5
1, 5
1, 2
1, 4
5
1
2
5/13/04