IBM25PPC440GP IBM Microelectronics, IBM25PPC440GP Datasheet - Page 57

• Manufacturer Part Number: IBM25PPC440GP
• Description: PowerPC 440GP Embedded Processor
• Manufacturer: IBM Microelectronics

PowerPC 440GP Embedded Processor Data Sheet
I/O Specifications—All Speeds
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. PCI-X timings are for asynchronous operation up to 133MHz. PCI-X input setup time requirement is 1.2ns for 133MHz
3. The clock frequency for RMII operation is 50MHz ± 100ppm.
4. The clock frequency for SMII operation is 125MHz ± 100ppm.
5. These are DDR signals that can change on both the positive and negative clock transitions.
5/13/04
PCI-X Interface
PCIXAD00:63
PCIXC3:0[BE3:0]
PCIXParLow
PCIParHigh
PCIXFrame
PCIXINT
PCIXIRDY
PCIXTRDY
PCIXStop
PCIXDevSel
PCIXIDSel
PCIXPErr
PCIXSErr
PCIXClk
PCIXReset
PCIXReq64
PCIXAck64
PCIXCap
PCIX133Cap
PCIXM66En
PCIXReq0:5
PCIXGnt0:5
Ethernet MII Interface
EMCRxD0:3
EMCRxDV
EMCRxClk
EMCRxErr
EMCTxD0:3
EMCTxEn
EMCTxClk
EMCTxErr
EMCCrS
EMCCD
EMCMDIO
EMCMDClk
and 1.7ns for 66MHz. PCI timings (in parentheses) are for asynchronous operation up to 66MHz. PCI output hold time
requirement is 1ns for 66MHz and 2ns for 33MHz.
Signal
Setup Time
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
(T
Note 2 (3
IS
n/a)
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
dc
4
4
4
min)
Input (ns)
Hold Time
(T
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
IH
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
dc
1
1
1
min)
(Part 1 of 3)
Valid Delay
(T
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
OV
n/a
n/a
n/a
n/a
3.8
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
dc
15
15
15
max)
Output (ns)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
Hold Time
(T
OH
n/a
n/a
n/a
n/a
0.7
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
dc
2
2
2
min)
(minimum)
Output Current (mA)
I/O H
10.3
10.3
10.3
10.3
10.3
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
n/a
0.5
0.5
n/a
n/a
0.5
0.5
n/a
0.5
n/a
n/a
0.5
n/a
n/a
n/a
n/a
n/a
n/a
n/a
(minimum)
I/O L
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
n/a
1.5
1.5
n/a
n/a
1.5
1.5
n/a
1.5
n/a
n/a
1.5
n/a
n/a
n/a
n/a
7.1
7.1
n/a
7.1
n/a
n/a
7.1
7.1
EMCMDClk
EMCRxClk
EMCRxClk
EMCRxClk
EMCTxClk
EMCTxClk
EMCTxClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
Clock
Page 57 of 72
1, async
1, async
1, async
1, async
1, async
Notes
async
async
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1