IBM25PPC440GP IBM Microelectronics, IBM25PPC440GP Datasheet - Page 64

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IBM25PPC440GP

Manufacturer Part Number
IBM25PPC440GP
Description
PowerPC 440GP Embedded Processor
Manufacturer
IBM Microelectronics
Datasheet
I/O Timing—DDR SDRAM T
Notes:
1. All of the DQS signals are referenced to MemClkOut0(0).
2. Clock speed is 133MHz.
3. The T
4. To obtain adjusted values for lower clock frequencies, subtract 5.625 ns from the values in the table and add 3/4 of the
I/O Timing—DDR SDRAM T
Notes:
1. Clock speed is 133MHz. T
2. To obtain adjusted T
3. To obtain adjusted T
Page 64 of 72
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
MemAddr00:12
BA0:1
BankSel0:3
ClkEn0:3
CAS
RAS
WE
subtract T
add T
cycle time for the lower clock frequency (T
SK
DS
minimum (0.25T
values in the table include 3/4 of a cycle at 133MHz (7.5ns x 0.75 = 5.625 ns).
SK
Signal Name
Signal Name
maximum (0.75T
SA
HA
values for lower clock frequencies, use 3/4 of the cycle time for the lower clock frequency and
values for lower clock frequencies, use 1/4 of the cycle time for the lower clock frequency and
CYC
SK
PowerPC 440GP Embedded Processor Data Sheet
is referenced to MemClkOut0(0). T
+ T
CYC
SK
- T
min).
DS
SK
SK
, T
max).
DS
SA
Minimum
- 5.625 + 0.75T
0.4
0.4
0.4
0.4
0.4
0.4
0.4
, and T
Minimum
T
SK
HA
na
na
na
na
na
na
na
na
na
(ns)
CYC
Maximum
SA
).
1.2
1.2
1.2
1.2
1.2
1.2
1.2
and T
HA
T
DS
are referenced to MemClkOut0(90).
(ns)
Minimum
T
SA
4.425
4.425
4.425
4.425
4.425
4.425
4.425
(ns)
Maximum
6.25
6.25
6.25
6.25
6.25
6.25
6.25
6.25
6.25
Minimum
T
HA
2.275
2.275
2.275
2.275
2.275
2.275
2.275
(ns)
5/13/04

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