28F640W30 NUMONYX [Numonyx B.V], 28F640W30 Datasheet - Page 20

• Manufacturer Part Number: 28F640W30
• Description: Numonyx Wireless Flash Memory (W30)
• Manufacturer: NUMONYX [Numonyx B.V]

4.2
Table 5:
Datasheet
20
D[15:0]
A[22:0]
Symbol
ADV#
RST#
VCCQ
VSSQ
WAIT
WE#
WP#
CE#
OE#
VCC
VSS
CLK
VPP
DU
NC
Signal Descriptions - µBGA Package & VF BGA Package
Output
Output
Power/
Input/
Power
Power
Power
Power
Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
Signal Descriptions
—
—
•
•
Table 5
Table 6
ADDRESS INPUTS: For memory addresses. 32 Mbit: A[20:0]; 64 Mbit: A[21:0]; 128 Mbit: A[22:0]
DATA INPUTS/OUTPUTS:
Data pins are High-Z when the flash device or its outputs are deselected. Data is internally latched
during writes.
ADDRESS VALID: ADV# indicates valid address presence on address inputs. During synchronous
read operations, all addresses are latched on the rising edge of ADV#, or the next valid CLK edge with
ADV# low, whichever occurs first.
CHIP ENABLE:
CLOCK: CLK synchronizes the flash device to the system bus frequency during synchronous reads and
increments an internal address generator. During synchronous read operations, addresses are latched
on ADV#’s rising edge or CLK’s rising (or falling) edge, whichever occurs first.
OUTPUT ENABLE:
RESET: When low, RST# resets internal automation and inhibits write operations. This reset provides
data protection during power transitions. De-asserting RST# enables normal operation and places the
flash device in asynchronous read-array mode.
WAIT: The WAIT signal indicates valid data during synchronous read modes. It can be configured to
be asserted-high or asserted-low, based on bit 10 of the Read Configuration Register. WAIT is tri-
stated if CE# is deasserted. WAIT is not gated by OE#.
WRITE ENABLE: WE# controls writes to the CUI and array. Addresses and data are latched on the
rising edge of WE#.
WRITE PROTECT: Disables/enables the lock-down function. When WP# is asserted, the lock-down
mechanism is enabled and blocks marked lock-down cannot be unlocked through software. See
Section 13.1, “Block Lock Operations” on page 71
ERASE AND PROGRAM POWER: A valid voltage on this pin allows erasing or programming. Flash
memory contents cannot be altered when V
operations at invalid V
Set V
from the system supply, the V
min to perform in-system flash device modification. VPP can be 0 V during read operations.
V
VPP can be connected to 12 V for a cumulative total not to exceed 80 hours. Extended use of this pin
at 12 V might reduce block cycling capability.
FLASH DEVICE POWER SUPPLY: Writes are inhibited at V
operations at invalid V
OUTPUT POWER SUPPLY: Enables all outputs to be driven at V
GROUND: Pins for all internal flash device circuitry must be connected to system ground.
OUTPUT GROUND: Provides ground to all outputs which are driven by VCCQ. This signal can be tied
directly to VSS.
DO NOT USE: Do not use this pin. Do not connect this pin to any power supplies, signals, or other
pins; this pin must be floated.
NO CONNECT: No internal connection; can be driven or floated.
• Inputs data and commands during write cycles.
• Outputs data during reads.
• Asserting CE# activates internal control logic, I/O buffers, decoders, and sense amps.
• De-asserting CE# deselects the flash device, places it in standby mode, and tri-states all outputs.
• When asserted, OE# enables the flash device output data buffers during a read cycle.
• When OE# is deasserted, data outputs are placed in a high-impedance state.
PPH
can be applied to main blocks for 1000 cycles maximum and to parameter blocks for 2500 cycles.
PP
describes the signals for the 56-ball VF BGA and µBGA Chip Scale Package.
describes the signals for the QUAD+ package ballout.
= V
CC
for in-system program and erase operations. To accommodate resistor or diode drops
PP
CC
voltages.
voltages.
IH
level of V
Name and Function
PP
PP
can be as low as V
V
PPLK
. Do not attempt block erase and program
Numonyx™ Wireless Flash Memory (W30)
Numonyx™ Wireless Flash Memory (W30)
CC
PPL
for details on block locking.
V
CCQ
LKO
min. V
.
. Do not attempt flash device
PP
must remain above V
Order Number: 290702-13
November 2007
PPL