28F640W30 NUMONYX [Numonyx B.V], 28F640W30 Datasheet - Page 53

• Manufacturer Part Number: 28F640W30
• Description: Numonyx Wireless Flash Memory (W30)
• Manufacturer: NUMONYX [Numonyx B.V]

Numonyx™ Wireless Flash Memory (W30)
Table 19: Bus Cycle Definitions
9.3
Figure 25: Normal Write and Read Cycles
November 2007
Order Number: 290702-13
Notes:
1.
2.
3.
Configuration
Protection
Operation
First-cycle command addresses must be the same as the target address of the operation. Examples:
—The first-cycle address for the Read Identifier command must be the same as the Identification code address (IA).
—The first-cycle address for the Word Program command must be the same as the word address (WA) to be
programmed.
—The first-cycle address for the Erase/Program Suspend command must be the same as the address within the block
to be suspended.
XX= Any valid address within the flash device.
IA= Identification code address.
BA= Block Address. Any address within a specific block.
LPA= The Lock Protection Address is obtained from the CFI (through the Read Query command). The W30 flash
memory device family LPA is at 0080h.
PA= User programmable 4-word protection address.
PnA= Any address within a specific partition.
PBA= Partition Base Address. The first address of a particular partition.
QA= Query code address.
WA= Word address of memory location to be written.
SRD= Status register data.
WD= Data to be written at location WA.
IC= Identifier code data.
PD= User programmable 4-word protection data.
QD= Query code data on D[7:0].
CD= Configuration register code data presented on flash device addresses A[15:0]. A[MAX:16] address bits can
select any partition. See
configuration
register bits descriptions.
Do not use commands other than those shown above. Other commands are reserved by Numonyx for future flash
device implementations.
Address [A]
WE# [W]
Data [Q]
OE# [G]
Command Sequencing
When issuing a 2-cycle write sequence to the flash device, a read operation can occur
between the two write cycles. The setup phase of a 2-cycle write sequence places the
addressed partition into read-status mode, so if the same partition is read before the
second confirm write cycle is issued, status register data is returned. Reads from other
partitions, however, can return actual array data, if the addressed partition is already in
read-array mode.
Protection Program
Lock Protection Program
Set Configuration
Register
Command
Table 27, “Read Configuration Register Definitions” on page 79
Partition A
Figure 25
Block Erase Setup
20h
Cycles
Bus
2
2
2
and
Figure 26
Partition A
Oper
Write
Write
Write
Block Erase Conf irm
First Bus Cycle
D0h
illustrate these two conditions.
Addr
LPA
CD
PA
1
Data
Partition A
C0h
C0h
60h
2,3
Read Array
FFh
Oper
Write
Write
Write
Second Bus Cycle
Addr
LPA
CD
PA
1
for
Datasheet
Data
FFFDh
03h
PD
2,3
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