28F640W30 NUMONYX [Numonyx B.V], 28F640W30 Datasheet - Page 80
28F640W30
Manufacturer Part Number
28F640W30
Description
Numonyx Wireless Flash Memory (W30)
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.28F640W30.pdf
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Table 28: Read Configuration Register Descriptions (Sheet 2 of 2)
14.1
14.2
Figure 38: First Access Latency Configuration
Note:
)
Datasheet
80
Notes:
1.
2.
3.
4.
5.
6.
2-0
Bit
3
Other First Access Latency Configuration settings are reserved.
Undocumented combinations of bits are reserved by Numonyx for future implementations.
Synchronous and page read mode configurations affect reads from main blocks and parameter blocks. Status Register
and configuration reads support single read cycles. RCR[15]=1 disables the configuration set by RCR[14:0].
Data is not ready when WAIT is asserted.
Set the synchronous burst length. In asynchronous page mode, the burst length equals four words.
Set all reserved Read Configuration Register bits to zero.
Setting the Read Configuration Register for synchronous burst-mode with a latency count of 2 (RCR[13:11] = 010),
data hold for 2 clocks (RCR[9] = 1), and WAIT asserted one data cycle before delay (RCR[8] =1) is not supported.
Address [A]
D[15:0] [Q]
D[15:0] [Q]
D[15:0] [Q]
D[15:0] [Q]
ADV# [V]
CLK [C]
Read Mode (RCR[15])
All partitions support two high-performance read configurations and RCR[15] sets the
read configuration to one of these modes:
Status register, query, and identifier modes support only asynchronous and single-
synchronous read operations.
First Access Latency Count (RCR[13:11])
The First Access Latency Count (RCR[13:11]) configuration tells the flash device how
many clocks must elapse from ADV# de-assertion (V
word onto its data pins. The input clock frequency determines this value. See
“Read Configuration Register Definitions” on page 79
Figure 38
to
Burst Length
Burst Wrap
• synchronous burst mode
• asynchronous page mode (default)
BL[2:0]
Name
Section 14.2.1, “Latency Count Settings” on page 81
BW
Address
shows data output latency from ADV# assertion for different latencies. Refer
Valid
Code 3
Code 4
Code 5
Code 2
0 = Wrap bursts within burst length set by CR[2:0]
1 = Don’t wrap accesses within burst length set by CR[2:0].(Default)
001 = 4-Word Burst
010 = 8-Word Burst
011 = 16-Word Burst (Available on the 130 nm lithography)
111 = Continuous Burst (Default)
Output
Valid
Description
Output
Output
Valid
Valid
Output
Output
Output
Valid
Valid
Valid
Numonyx™ Wireless Flash Memory (W30)
Numonyx™ Wireless Flash Memory (W30)
1
IH
for latency values.
) before driving the first data
for Latency Code Settings.
Output
Output
Output
Output
Valid
Valid
Valid
Valid
Output
Output
Output
Output
Valid
Valid
Valid
Valid
Order Number: 290702-13
Output
Output
Output
Output
Valid
Valid
Valid
Valid
November 2007
Table 27,
Notes
4
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