28F640W30 NUMONYX [Numonyx B.V], 28F640W30 Datasheet - Page 34
28F640W30
Manufacturer Part Number
28F640W30
Description
Numonyx Wireless Flash Memory (W30)
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.28F640W30.pdf
(102 pages)
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Figure 11: Single Synchronous Read-Array Operation Waveform
Notes:
1.
2.
3.
Datasheet
34
Section 14.2, “First Access Latency Count (RCR[13:11])” on page 80
cycles during the initial access.
WAIT (shown asserted; RCR[10]=0) can be configured to assert either during, or one data cycle before, valid data.
In this waveform, an x-word burst is initiated to the main array and it is terminated by a CE# de-assertion after the first
word in the burst. If this access had been done to Status, ID, or Query reads, the asserted (low) WAIT signal would have
remained asserted (low) as long as CE# is asserted (low).
R12
Numonyx™ Wireless Flash Memory (W30)
Numonyx™ Wireless Flash Memory (W30)
R13
describes how to insert clock
Order Number: 290702-13
November 2007
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