28F640W30 NUMONYX [Numonyx B.V], 28F640W30 Datasheet - Page 83

• Manufacturer Part Number: 28F640W30
• Description: Numonyx Wireless Flash Memory (W30)
• Manufacturer: NUMONYX [Numonyx B.V]

Figure 41: Data Output Configuration with WAIT Signal Delay
Note:
14.6
14.7
WAIT shown asserted high (RCR[10]=1).
Data Hold
Data Hold
1 CLK
2 CLK
This equation is satisfied, and data output is available and valid at every clock period. If
t
determined using the formula:
Subsequent reads in page mode are defined by:
WAIT Delay (RCR[8])
The WAIT configuration bit (RCR[8]) controls WAIT signal delay behavior for all
synchronous read-array modes. This bit setting depends on the system and CPU
characteristics. The WAIT can be asserted either during, or one data cycle before, a
valid output.
In synchronous linear read array (no-wrap mode RCR[3]=1) of 4-word, 8-word, 16-
word, or continuous-word burst mode, an output delay might occur when a burst
sequence crosses its first flash device-row boundary (16-word boundary).
Burst Sequence (RCR[7])
The burst sequence specifies the synchronous-burst mode data order (see
“Sequence and Burst Length” on page
either 4-word, 8-word, or 16-word burst length with the burst wrap bit (RCR[3]) set, or
in continuous burst mode, the flash device might incur an output delay when the burst
sequence crosses the first 16-word boundary. (See
page 81
DATA is long, hold for two cycles.
• If the burst start address is 4-word boundary aligned, the delay does not occur.
• If the start address is misaligned to a 4-word boundary, the delay occurs once per
WAIT (CR.8 = 1)
WAIT (CR.8 = 0)
burst-mode read sequence. The WAIT signal informs the system of this delay.
WAIT (CR.8 = 1)
WAIT (CR.8 = 0)
DQ
DQ
CLK [C]
15-0
15-0
for word boundary description.)
[Q]
[Q]
20 ns + 4 ns
t
t
ADD-DELAY (ns)
APA (ns) +
t
DATA
t
During page-mode reads, the initial access time can be
CHTL/H
t
DATA
25 ns
(ns)
(ns) + t
84). When operating in a linear burst mode,
(minimum time)
AVQV
t
t
CHQV
CHQV
(ns)
Output
Valid
Output
Figure 39, “Word Boundary” on
Valid
Note 1
Note 1
Note 1
Note 1
Output
Valid
Output
Valid
Output
Valid
Table 30,