16F876 Microchip Technology, 16F876 Datasheet - Page 24

• Manufacturer Part Number: 16F876
• Description: 28/40-pin 8-Bit CMOS FLASH Microcontrollers
• Manufacturer: Microchip Technology

PIC16F87X
2.2.2.7
The PIR2 register contains the flag bits for the CCP2
interrupt, the SSP bus collision interrupt and the
EEPROM write operation interrupt.
REGISTER 2-7: PIR2 REGISTER (ADDRESS 0Dh)
DS30292B-page 24
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2-1: Unimplemented: Read as '0'
bit 0:
U-0
—
PIR2 REGISTER
Unimplemented: Read as '0'
Reserved: Always maintain this bit clear
Unimplemented: Read as '0'
EEIF: EEPROM Write Operation Interrupt Flag bit
1 = The write operation completed (must be cleared in software)
0 = The write operation is not complete or has not been started
BCLIF: Bus Collision Interrupt Flag
1 = A bus collision has occurred in the SSP, when configured for I
0 = No bus collision has occurred
CCP2IF: CCP2 Interrupt Flag bit
Capture Mode
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare Mode
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM Mode
Unused
R/W-0
—
U-0
—
R/W-0
EEIF
BCLIF
R/W-0
U-0
—
.
Note:
U-0
—
bit0
CCP2IF
R/W-0
Interrupt flag bits get set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
2
C master mode
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n= Value at POR reset
1999 Microchip Technology Inc.
read as ‘0’