16F876 Microchip Technology, 16F876 Datasheet - Page 65

• Manufacturer Part Number: 16F876
• Description: 28/40-pin 8-Bit CMOS FLASH Microcontrollers
• Manufacturer: Microchip Technology

REGISTER 9-2:
1999 Microchip Technology Inc.
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3-0: SSPM3:SSPM0: Synchronous Serial Port Mode Select bits
WCOL
R/W-0
WCOL: Write Collision Detect bit
Master Mode:
1 = A write to SSPBUF was attempted while the I
0 = No collision
Slave Mode:
1 = SSPBUF register is written while still transmitting the previous word (must be cleared in software)
0 = No collision
SSPOV: Receive Overflow Indicator bit
In SPI mode
1 = A new byte is received while SSPBUF holds previous data. Data in SSPSR is lost on overflow. . In
slave mode the user must read the SSPBUF, even if only transmitting data, to avoid overflows. In master
mode the overflow bit is not set since each operation is initiated by writing to the SSPBUF register. (Must
be cleared in software).
0 = No overflow
In I
1 = A byte is received while the SSPBUF is holding the previous byte. SSPOV is a "don’t care" in trans-
mit mode. (Must be cleared in software).
0 = No overflow
SSPEN: Synchronous Serial Port Enable bit
In SPI mode, when enabled, these pins must be properly configured as input or output.
1 = Enables serial port and configures SCK, SDO, SDI, and SS as the source of the serial port pins
0 = Disables serial port and configures these pins as I/O port pins
In I
1 = Enables the serial port and configures the SDA and SCL pins as the source of the serial port pins
0 = Disables serial port and configures these pins as I/O port pins
CKP: Clock Polarity Select bit
In SPI mode
1 = Idle state for clock is a high level
0 = Idle state for clock is a low level
In I
1 = Enable clock
0 = Holds clock low (clock stretch) (Used to ensure data setup time)
In I
Unused in this mode
0000 = SPI master mode, clock = F
0001 = SPI master mode, clock = F
0010 = SPI master mode, clock = F
0011 = SPI master mode, clock = TMR2 output/2
0100 = SPI slave mode, clock = SCK pin. SS pin control enabled.
0101 = SPI slave mode, clock = SCK pin. SS pin control disabled. SS can be used as I/O pin
0110 = I
0111 = I
1000 = I
1011 = I
1110 = I
1111 = I
1001, 1010, 1100, 1101 = reserved
SSPOV
R/W-0
2
2
2
2
C mode
C mode, when enabled, these pins must be properly configured as input or output.
C slave mode, SCK release control
C master mode
2
2
2
2
2
2
C slave mode, 7-bit address
C slave mode, 10-bit address
C master mode, clock = F
C firmware controlled master mode (slave idle)
C firmware controlled master mode, 7-bit address with start and stop bit interrupts enabled
C firmware controlled master mode, 10-bit address with start and stop bit interrupts enabled.
SSPCON: SYNC SERIAL PORT CONTROL REGISTER (ADDRESS 14h)
SSPEN
R/W-0
R/W-0
CKP
SSPM3
R/W-0
OSC
OSC
OSC
OSC
/4
/16
/64
/ (4 * (SSPADD+1) )
SSPM2
R/W-0
2
C conditions were not valid
SSPM1
R/W-0
bit0
SSPM0
R/W-0
R = Readable bit
W = Writable bit
U = Unimplemented bit, read
- n = Value at POR reset
PIC16F87X
as ‘0’
DS30292A-page 65