16F876 Microchip Technology, 16F876 Datasheet - Page 55

• Manufacturer Part Number: 16F876
• Description: 28/40-pin 8-Bit CMOS FLASH Microcontrollers
• Manufacturer: Microchip Technology

7.0
Timer2 is an 8-bit timer with a prescaler and a
postscaler. It can be used as the PWM time-base for
the PWM mode of the CCP module(s). The TMR2 reg-
ister is readable and writable, and is cleared on any
device reset.
The input clock (F
1:4
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The Timer2 module has an 8-bit period register PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is ini-
tialized to FFh upon reset.
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in flag bit
TMR2IF, (PIR1<1>)).
Timer2 can be shut off by clearing control bit TMR2ON
(T2CON<2>) to minimize power consumption.
Register 7-1 shows the Timer2 control register.
Additional information on timer modules is available in
the PICmicro™ Mid-Range MCU Family Reference
Manual (DS33023).
REGISTER 7-1: T2CON: TIMER2 CONTROL REGISTER (ADDRESS 12h)
bit7
1999 Microchip Technology Inc.
bit 7:
bit 6-3:
bit 2:
bit 1-0:
U-0
—
or
TIMER2 MODULE
Unimplemented: Read as '0'
TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits
0000 = 1:1 Postscale
0001 = 1:2 Postscale
0010 = 1:3 Postscale
•
•
•
1111 = 1:16 Postscale
TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits
00 = Prescaler is 1
01 = Prescaler is 4
1x = Prescaler is 16
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0
1:16,
R/W-0
OSC
selected
/4) has a prescale option of 1:1,
R/W-0
R/W-0
by
control
R/W-0
bits
R/W-0
7.1
The prescaler and postscaler counters are cleared
when any of the following occurs:
• a write to the TMR2 register
• a write to the T2CON register
• any device reset (POR, MCLR reset, WDT reset
TMR2 is not cleared when T2CON is written.
7.2
The output of TMR2 (before the postscaler) is fed to the
SSPort module, which optionally uses it to generate
shift clock.
FIGURE 7-1:
Note 1: TMR2 register output can be software selected
R/W-0
or BOR)
Sets flag
bit TMR2IF
1:1
Postscaler
T2OUTPS3:
T2OUTPS0
to
Timer2 Prescaler and Postscaler
Output of TMR2
by the SSP module as a baud clock.
1:16
4
R/W-0
TMR2
output
Reset
bit0
EQ
TIMER2 BLOCK DIAGRAM
(1)
Comparator
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
TMR2 reg
PR2 reg
PIC16F87X
read as ‘0’
1:1, 1:4, 1:16
Prescaler
DS30292B-page 55
T2CKPS1:
T2CKPS0
2
F
OSC
/4