16F876 Microchip Technology, 16F876 Datasheet - Page 66
16F876
Manufacturer Part Number
16F876
Description
28/40-pin 8-Bit CMOS FLASH Microcontrollers
Manufacturer
Microchip Technology
Datasheet
1.16F876.pdf
(200 pages)
- Current page: 66 of 200
- Download datasheet (4Mb)
PIC16F87X
REGISTER 9-3:
DS30292A-page 66
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
GCEN
R/W-0
Note:
RSEN: Repeated Start Condition Enabled bit (In I
SEN: Start Condition Enabled bit (In I
GCEN: General Call Enable bit (In I
1 = Enable interrupt when a general call address (0000h) is received in the SSPSR.
0 = General call address disabled.
ACKSTAT: Acknowledge Status bit (In I
In master transmit mode:
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
ACKDT: Acknowledge Data bit (In I
In master receive mode:
Value that will be transmitted when the user initiates an Acknowledge sequence at the end of a receive.
1 = Not Acknowledge
0 = Acknowledge
ACKEN: Acknowledge Sequence Enable bit (In I
In master receive mode:
1 = Initiate Acknowledge sequence on SDA and SCL pins, and transmit ACKDT data bit. Automatically
cleared by hardware.
0 = Acknowledge sequence idle
RCEN: Receive Enable bit (In I
1 = Enables Receive mode for I
0 = Receive idle
PEN: Stop Condition Enable bit (In I
SCK release control
1 = Initiate Stop condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Stop condition idle
1 = Initiate Repeated Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Repeated Start condition idle.
1 = Initiate Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Start condition idle.
ACKSTAT
For bits ACKEN, RCEN, PEN, RSEN, SEN: If the I
be set (no spooling), and the SSPBUF may not be written (or writes to the SSPBUF are disabled).
R/W-0
SSPCON2: SYNC SERIAL PORT CONTROL REGISTER2 (ADDRESS 91h)
ACKDT
R/W-0
ACKEN
R/W-0
2
2
C master mode only).
C
R/W-0
RCEN
2
2
2
2
C master mode only)
C master mode only).
C slave mode only)
C master mode only)
2
C master mode only)
R/W-0
PEN
2
2
C master mode only)
C master mode only).
2
C module is not in the idle mode, this bit may not
R/W-0
RSEN
bit0
R/W-0
SEN
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n =Value at POR reset
1999 Microchip Technology Inc.
Read as ‘0’
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