16F876 Microchip Technology, 16F876 Datasheet - Page 80

• Manufacturer Part Number: 16F876
• Description: 28/40-pin 8-Bit CMOS FLASH Microcontrollers
• Manufacturer: Microchip Technology

PIC16F87X
9.2.10
A Repeated Start condition occurs when the RSEN bit
(SSPCON2<1>) is programmed high and the I
ule is in the idle state. When the RSEN bit is set, the
SCL pin is asserted low. When the SCL pin is sampled
low, the baud rate generator is loaded with the contents
of SSPADD<6:0> and begins counting. The SDA pin is
released (brought high) for one baud rate generator
count (T
if SDA is sampled high, the SCL pin will be deasserted
(brought high). When SCL is sampled high the baud
rate generator is reloaded with the contents of
SSPADD<6:0> and begins counting.
must be sampled high for one T
followed by assertion of the SDA pin (SDA is low) for
one T
bit in the SSPCON2 register will be automatically
cleared and the baud rate generator will not be
reloaded, leaving the SDA pin held low. As soon as a
start condition is detected on the SDA and SCL pins,
the S bit (SSPSTAT<3>) will be set. The SSPIF bit will
not be set until the baud rate generator has timed-out.
FIGURE 9-13: REPEAT START CONDITION WAVEFORM
DS30292A-page 80
Note 1: If RSEN is programmed while any other
Note 2: A bus collision during the Repeated Start
BRG
BRG
I
CONDITION TIMING
, while SCL is high. Following this, the RSEN
2
C MASTER MODE REPEATED START
event is in progress, it will not take effect.
condition occurs if:
• SDA is sampled low when SCL goes
• SCL goes low before SDA is asserted
). When the baud rate generator times out
from low to high.
low. This may indicate that another
master is attempting to transmit a
data "1".
Falling edge of ninth clock
SDA
SCL
End of Xmit
BRG
Write to SSPCON2
occurs here.
SDA = 1,
SCL(no change)
. This action is then
SDA and SCL
2
C mod-
T
SDA = 1,
SCL = 1
BRG
T
BRG
Immediately following the SSPIF bit getting set, the
user may write the SSPBUF with the 7-bit address in
7-bit mode, or the default first address in 10-bit mode.
After the first eight bits are transmitted and an ACK is
received, the user may then transmit an additional eight
bits of address (10-bit mode) or eight bits of data (7-bit
mode).
9.2.10.1
If the user writes the SSPBUF when a Repeated Start
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
Note:
Sr = Repeated Start
T
BRG
At completion of start bit,
hardware clear RSEN bit
Set S (SSPSTAT<3>)
WCOL STATUS FLAG
Because queueing of events is not
allowed, writing of the lower 5 bits of
SSPCON2 is disabled until the Repeated
Start condition is complete.
and set SSPIF
Write to SSPBUF occurs here.
T
BRG
1st Bit
T
BRG
1999 Microchip Technology Inc.