16F876 Microchip Technology, 16F876 Datasheet - Page 48

• Manufacturer Part Number: 16F876
• Description: 28/40-pin 8-Bit CMOS FLASH Microcontrollers
• Manufacturer: Microchip Technology

PIC16F87X
5.2
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of T0CKI with the internal phase clocks is accom-
plished by sampling the prescaler output on the Q2 and
Q4 cycles of the internal phase clocks. Therefore, it is
necessary for T0CKI to be high for at least 2Tosc (and
a small RC delay of 20 ns) and low for at least 2Tosc
(and a small RC delay of 20 ns). Refer to the electrical
specification of the desired device.
5.3
There is only one prescaler available, which is mutually
exclusively shared between the Timer0 module and the
watchdog timer. A prescaler assignment for the Timer0
REGISTER 5-1: OPTION_REG REGISTER
DS30292B-page 48
bit 7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2-0: PS2:PS0: Prescaler Rate Select bits
Note:
R/W-1
RBPU
Using Timer0 with an External Clock
Prescaler
RBPU
INTEDG
T0CS: TMR0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
Bit Value
To avoid an unintended device RESET, the instruction sequence shown in the PICmicro™ Mid-Range MCU
Family Reference Manual (DS33023) must be executed when changing the prescaler assignment from
Timer0 to the WDT. This sequence must be followed even if the WDT is disabled.
000
001
010
011
100
101
110
111
INTEDG
R/W-1
TMR0 Rate
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
R/W-1
T0CS
WDT Rate
R/W-1
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
T0SE
R/W-1
PSA
R/W-1
PS2
module means that there is no prescaler for the watch-
dog timer, and vice-versa. This prescaler is not readable
or writable (see Figure 5-1).
The PSA and PS2:PS0 bits (OPTION_REG<3:0>) deter-
mine the prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (e.g. CLRF 1, MOVWF 1,
BSF 1,x....etc.) will clear the prescaler. When assigned
to WDT, a CLRWDT instruction will clear the prescaler
along with the Watchdog Timer. The prescaler is not
readable or writable.
Note:
R/W-1
PS1
Writing to TMR0, when the prescaler is
assigned to Timer0, will clear the prescaler
count, but will not change the prescaler
assignment.
R/W-1
PS0
bit 0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
1999 Microchip Technology Inc.
read as ‘0’