16F876 Microchip Technology, 16F876 Datasheet - Page 86

• Manufacturer Part Number: 16F876
• Description: 28/40-pin 8-Bit CMOS FLASH Microcontrollers
• Manufacturer: Microchip Technology

PIC16F87X
9.2.14
A stop bit is asserted on the SDA pin at the end of a
receive/transmit by setting the Stop Sequence Enable
bit PEN (SSPCON2<2>). At the end of a receive/trans-
mit, the SCL line is held low after the falling edge of the
ninth clock. When the PEN bit is set, the master will
assert the SDA line low . When the SDA line is sam-
pled low, the baud rate generator is reloaded and
counts down to 0. When the baud rate generator times
out, the SCL pin will be brought high, and one T
(baud rate generator rollover count) later, the SDA pin
will be deasserted. When the SDA pin is sampled high
FIGURE 9-17: STOP CONDITION RECEIVE OR TRANSMIT MODE
DS30292A-page 86
STOP CONDITION TIMING
SCL
SDA
Write to SSPCON2
Falling edge of
9th clock
Note: T
ACK
Set PEN
BRG
= one baud rate generator period.
SDA asserted low before rising edge of clock
to setup stop condition.
T
T
BRG
BRG
BRG
T
SCL brought high after T
BRG
SCL = 1 for T
after SDA sampled high. P bit (SSPSTAT<4>) is set
P
T
BRG
while SCL is high, the P bit (SSPSTAT<4>) is set. A
T
set
Whenever the firmware decides to take control of the
bus, it will first determine if the bus is busy by checking
the S and P bits in the SSPSTAT register. If the bus is
busy, then the CPU can be interrupted (notified) when
a Stop bit is detected (i.e. bus is free).
9.2.14.1
If the user writes the SSPBUF when a STOP sequence
is in progress, then WCOL is set and the contents of the
buffer are unchanged (the write doesn’t occur).
BRG
(Figure
BRG
PEN bit (SSPCON2<2>) is cleared by
later, the PEN bit is cleared and the SSPIF bit is
hardware and the SSPIF bit is set
, followed by SDA = 1 for T
BRG
WCOL STATUS FLAG
9-17).
1999 Microchip Technology Inc.
BRG