C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 206

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C8051F962-A-GM

Manufacturer Part Number
C8051F962-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F962-A-GM

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
DQFN-76
Mounting Style
SMD/SMT
Number Of Programmable I/os
57
Number Of Timers
4
C8051F96x
SFR Definition 14.6. AES0YOUT: AES Y Output
SFR Address = 0xF5; SFR page = 0x2; Not bit-Addressable
206
Name
Reset
7:0 AES0YOUT[7:0] AES Y Output.
Bit
Type
Bit
Name
R
7
0
Upon completion of an encryption/decryption operation The output data may be
read, one byte at a time, from the AES0YOUT SFR.
When used with the DMA, the DMA will read directly from this SFR.
The AES0YOUT SFR may be used in conjunction with the AES0XIN SFR for
some cipher block modes.
When used without the DMA, the firmware should wait on the DONE flag before
reading from the AES0YOUT SFR.
When used without the DMA and using XOR on the output, one byte should be
written to AES0XIN before reading each byte from AES0YOUT.
Reading this register over the C2 interface will not increment the output data.
R
6
0
R
5
0
AES0YOUT[7:0]
Rev. 0.5
R
4
0
Function
R
3
0
R
2
0
R
1
0
R
0
0

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