C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 303

• Manufacturer Part Number: C8051F962-A-GM
• Description: 8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
• Manufacturer: Silicon Labs

Specifications of C8051F962-A-GM

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8448 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.5 V to 3.3 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: DQFN-76
• Mounting Style: SMD/SMT
• Number Of Programmable I/os: 57
• Number Of Timers: 4

ness. As shown in Figure 24.2, duty cycles less than 65% indicate a robust oscillation. As the duty cycle
approaches 68%, oscillation becomes less reliable and the risk of clock failure increases. Increasing the
bias current (by disabling AGC) will always improve oscillation robustness and will reduce the output
clock’s duty cycle. This test should be performed at the worst case system conditions, as results at very
low temperatures or high supply voltage will vary from results taken at room temperature or low supply
voltage.
As an alternative to performing the oscillation robustness test, Automatic Gain Control may be disabled at
the cost of increased power consumption (approximately 200 nA). Disabling Automatic Gain Control will
provide the crystal oscillator with higher immunity against external factors which may lead to clock failure.
Automatic Gain Control must be disabled if using the SmaRTClock oscillator in self-oscillate mode.
Table 24.3 shows a summary of the oscillator bias settings. The SmaRTClock Bias Doubling feature allows
the self-oscillation frequency to be increased (almost doubled) and allows a higher crystal drive strength in
crystal mode. High crystal drive strength is recommended when the crystal is exposed to poor environmen-
tal conditions such as excessive moisture. SmaRTClock Bias Doubling is enabled by setting BIASX2
(RTC0XCN.5) to 1.
.
Figure 24.2. Interpreting Oscillation Robustness (Duty Cycle) Test Results
25%
Crystal
Self-Oscillate
Safe Operating Zone
Mode
Table 24.3. SmaRTClock Bias Settings
Bias Double Off, AGC On
Bias Double Off, AGC Off
Bias Double On, AGC On
Bias Double On, AGC Off
65%
Bias Double Off
Bias Double On
Low Risk of Clock
Rev. 0.5
Setting
Failure
68%
High Risk of Clock
Consumption
Failure
Highest
Lowest
Power
High
High
Low
Low
Duty Cycle
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