C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 298

no-image

C8051F962-A-GM

Manufacturer Part Number
C8051F962-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F962-A-GM

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
DQFN-76
Mounting Style
SMD/SMT
Number Of Programmable I/os
57
Number Of Timers
4
C8051F96x
SFR Definition 24.1. RTC0KEY: SmaRTClock Lock and Key
SFR Page = 0x0; SFR Address = 0xAE
SFR Definition 24.2. RTC0ADR: SmaRTClock Address
SFR Page = 0x0; SFR Address = 0xAC
298
Note: The ADDR bits increment after each indirect read/write operation that targets a CAPTUREn or ALARMnBn
Name
Reset
Name
Reset
Type
Type
Bit
Bit
7:0
Bit
Bit
4:0
7
6
5
internal SmaRTClock register.
ADDR[4:0] SmaRTClock Indirect Register Address.
Reserved Read = 0; Write = don’t care.
AUTORD SmaRTClock Interface Autoread Enable.
RTC0ST
Unused
Name
Name
R
7
0
7
0
SmaRTClock Interface Status.
Provides lock status when read.
Enables/disables Autoread.
0: Autoread Disabled.
1: Autoread Enabled.
Read = 0b; Write = Don’t Care.
Sets the currently selected SmaRTClock register.
See Table 24.1 for a listing of all SmaRTClock indirect registers.
AUTORD
R/W
6
0
6
0
Read:
0x02: SmaRTClock Interface is unlocked.
Write:
Writes to RTC0KEY have no effect.
R
5
0
5
0
Rev. 0.5
4
0
4
0
RTC0ST[7:0]
R/W
Function
Function
3
0
3
0
ADDR[4:0]
R/W
2
0
2
0
1
0
1
0
0
0
0
0

Related parts for C8051F962-A-GM