C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 265

• Manufacturer Part Number: C8051F962-A-GM
• Description: 8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
• Manufacturer: Silicon Labs

Specifications of C8051F962-A-GM

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8448 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.5 V to 3.3 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: DQFN-76
• Mounting Style: SMD/SMT
• Number Of Programmable I/os: 57
• Number Of Timers: 4

SFR Definition 19.4. PMU0CF: Power Management Unit Configuration
SFR Page = 0x0; SFR Address = 0xB5
Notes:
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
1. Read-modify-write operations (ORL, ANL, etc.) should not be used on this register. Wake-up sources must
2. The Low Power Internal Oscillator cannot be disabled and the MCU cannot be placed in Suspend or Sleep
3. PMU0 requires two system clocks to update the wake-up source flags after waking from Suspend mode. The
be re-enabled each time the SLEEP or SUSPEND bits are written to 1.
Mode if any wake-up flags are set to 1. Software should clear all wake-up sources after each reset and after
each wake-up from Suspend or Sleep Modes.
wake-up source flags will read ‘0’ during the first two system clocks following the wake from Suspend mode.
SUSPEND
RTCFWK
RTCAWK
PMATWK
CPT0WK
RSTWK
CLEAR
SLEEP
SLEEP
Name
W
7
0
SUSPEND
Sleep Mode Select
Suspend Mode Select
Wake-up Flag Clear
Reset Pin Wake-up Flag
SmaRTClock Oscillator
Fail Wake-up Source
Enable and Flag
SmaRTClock Alarm
Wake-up Source Enable
and Flag
Port Match Wake-up
Source Enable and Flag
Comparator0 Wake-up
Source Enable and Flag
W
6
0
Description
CLEAR
W
5
0
RSTWK
Varies
Rev. 0.5
Writing 1 places the
device in Sleep Mode.
Writing 1 places the
device in Suspend Mode.
Writing 1 clears all wake-
up flags.
N/A
0: Disable wake-up on
SmaRTClock Osc. Fail.
1: Enable wake-up on
SmaRTClock Osc. Fail.
0: Disable wake-up on
SmaRTClock Alarm.
1: Enable wake-up on
SmaRTClock Alarm.
0: Disable wake-up on
Port Match Event.
1: Enable wake-up on 
Port Match Event.
0: Disable wake-up on
Comparator0 rising edge.
1: Enable wake-up on
Comparator0 rising edge.
R
4
RTCFWK
Varies
Write
R/W
3
RTCAWK
Varies
R/W
2
N/A
N/A
N/A
Set to 1 if a falling edge
has been detected on
RST.
Set to 1 if the SmaRT-
Clock Oscillator has failed.
Set to 1 if a SmaRTClock
Alarm has occurred.
Set to 1 if a Port Match
Event has occurred.
Set to 1 if Comparator0
rising edge has occurred.
C8051F96x
PMATWK
Varies
R/W
1
Read
1,2,3
CPT0WK
Varies
R/W
0
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