LPC1112FHN24/2021 NXP Semiconductors, LPC1112FHN24/2021 Datasheet - Page 56

• Manufacturer Part Number: LPC1112FHN24/2021
• Description: ARM Microcontrollers - MCU
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN24/2021

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Package / Case: HVQFN-24
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 2450

NXP Semiconductors
9. Static characteristics
Table 13.
T
LPC111X
Product data sheet
Symbol
V
LPC1100 series (LPC111x/101/201/301) power consumption
I
LPC1100L series (LPC111x/002/102/202/302) power consumption in low-current mode
I
DD
DD
amb
DD
=

40

Static characteristics
C to +85
Parameter
supply voltage (core
and external rail)
supply current
supply current

C, unless otherwise specified.
All information provided in this document is subject to legal disclaimers.
Conditions
Active mode; code
executed from flash
Sleep mode;
Deep-sleep mode;
V
Deep power-down mode;
V
Active mode; code
executed from flash
Sleep mode;
Deep-sleep mode;
V
Deep power-down mode;
V
DD
DD
DD
DD
system clock = 12 MHz
system clock = 50 MHz
system clock = 12 MHz
system clock = 1 MHz
system clock = 6 MHz
system clock = 12 MHz
system clock = 50 MHz
system clock = 12 MHz
system clock = 50 MHz
while(1){}
V
V
V
= 3.3 V
= 3.3 V
while(1){}
V
V
V
V
V
V
= 3.3 V
= 3.3 V
Rev. 8 — 20 February 2013
DD
DD
DD
DD
DD
DD
DD
DD
DD
= 3.3 V
= 3.3 V
= 3.3 V
= 3.3 V
= 3.3 V
= 3.3 V
= 3.3 V
= 3.3 V
= 3.3 V
LPC1110/11/12/13/14/15
[2][3][4]
[2][3][6]
[2][3][4]
[2][3][9]
[2][3][5]
[2][3][5]
[2][3][4]
[2][3][6]
[2][3][4]
[2][3][4]
[2][3][9]
[2][10]
[2][10]
[6][7]
[7][8]
[6][7]
[6][7]
[6][7]
[6][7]
[7][8]
[6][7]
[6][7]
32-bit ARM Cortex-M0 microcontroller
Min
1.8
-
-
-
-
-
-
-
-
-
-
-
-
-
[11]
Typ
3.3
3
9
2
6
220
840
1
2
7
1
5
2
220
[1]
© NXP B.V. 2013. All rights reserved.
Max
3.6
-
-
-
-
-
-
-
-
-
-
-
-
-
56 of 114
Unit
V
mA
mA
mA
A
nA
A
mA
mA
mA
mA
mA
A
nA