LPC1343FHN33,551 NXP Semiconductors, LPC1343FHN33,551 Datasheet - Page 142

• Manufacturer Part Number: LPC1343FHN33,551
• Description: IC MCU 32BIT 32KB FLASH 33HVQFN
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1343FHN33,551

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
• Development Tools By Supplier: OM11039, OM11040, OM11046, OM11048
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 33HVQFN EP
• Device Core: ARM Cortex M3
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4944; 935289655551

NXP Semiconductors
UM10375
User manual
9.11.6 Read Chip ID (Command: 0xFD, Data: read 2 bytes)
9.11.7 Set Device Status (Command: 0xFE, Data: write 1 byte)
The Chip ID is 16-bit wide. It returns the value the chip ID (LSB first).
The Set Device Status command sets bits in the Device Status Register.
Table 174. Set Device Status command description
Bit Symbol
0
1
2
3
•
In case the SOF frame number contained a CRC error, the frame number returned will
be the corrupted frame number as received by the device.
CON
CON_CH
SUS
SUS_CH
Value Description
0
1
0
1
0
1
0
1
All information provided in this document is subject to legal disclaimers.
The Connect bit indicates the current connect status of the
device. It controls the CONNECT output pin, used for
SoftConnect. Reading the connect bit returns the current connect
status. This bit is cleared by hardware when the V
is LOW for more than 3 ms. The 3 ms delay filters out temporary
dips in the V
Writing a 0 will make the CONNECT pin go HIGH.
Writing a 1 will make the CONNECT pin go LOW.
Connect Change.
This bit is cleared when read.
This bit is set when the device’s pull-up resistor is disconnected
because V
generated when this bit is 1.
Suspend: The Suspend bit represents the current suspend state.
When the device is suspended (SUS = 1) and the CPU writes a 0
into it, the device will generate a remote wake-up. This will only
happen when the device is connected (CON = 1). When the
device is not connected or not suspended, writing a 0 has no
effect. Writing a 1 to this bit has no effect.
This bit is reset to 0 on any activity.
This bit is set to 1 when the device hasn’t seen any activity on its
upstream port for more than 3 ms.
Suspend (SUS) bit change indicator. The SUS bit can toggle
because:
This bit is cleared when read.
SUS bit not changed.
SUS bit changed. At the same time a DEV_STAT interrupt is
generated.
•
•
•
Rev. 2 — 7 July 2010
The device goes into the suspended state.
The device is disconnected.
The device receives resume signalling on its upstream port.
BUS
BUS
disappeared. The DEV_STAT interrupt is
voltage.
Chapter 9: LPC13xx USB device controller
BUS
UM10375
status input
© NXP B.V. 2010. All rights reserved.
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Reset
value
0
0
0
0