LPC1343FHN33,551 NXP Semiconductors, LPC1343FHN33,551 Datasheet - Page 217

• Manufacturer Part Number: LPC1343FHN33,551
• Description: IC MCU 32BIT 32KB FLASH 33HVQFN
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1343FHN33,551

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
• Development Tools By Supplier: OM11039, OM11040, OM11046, OM11048
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 33HVQFN EP
• Device Core: ARM Cortex M3
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4944; 935289655551

NXP Semiconductors
Table 230. Slave Receiver mode
UM10375
User manual
Status
Code
(I2CSTAT)
0x98
0xA0
Status of the I
and hardware
Previously addressed
with General Call;
DATA byte has been
received; NOT ACK
has been returned.
A STOP condition or
Repeated START
condition has been
received while still
addressed as
SLV/REC or
SLV/TRX.
2
C-bus
…continued
Application software response
To/From I2DAT
Read data byte or 0
Read data byte or 0
Read data byte or 1
Read data byte
No STDAT action
or
No STDAT action
or
No STDAT action
or
No STDAT action
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 July 2010
To I2CON
STA STO SI
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
0
1
0
1
0
1
0
1
Chapter 12: LPC13xx I2C-bus controller
Next action taken by I
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
I2ADR[0] = logic 1.
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address. A START condition will be
transmitted when the bus becomes free.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
I2ADR[0] = logic 1. A START condition
will be transmitted when the bus becomes
free.
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
I2ADR[0] = logic 1.
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address. A START condition will be
transmitted when the bus becomes free.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
I2ADR[0] = logic 1. A START condition
will be transmitted when the bus becomes
free.
UM10375
© NXP B.V. 2010. All rights reserved.
2
C hardware
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