LPC1343FHN33,551 NXP Semiconductors, LPC1343FHN33,551 Datasheet - Page 274

IC MCU 32BIT 32KB FLASH 33HVQFN

LPC1343FHN33,551

Manufacturer Part Number
LPC1343FHN33,551
Description
IC MCU 32BIT 32KB FLASH 33HVQFN
Manufacturer
NXP Semiconductors
Series
LPC13xxr
Datasheets

Specifications of LPC1343FHN33,551

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC13
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, UART
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
28
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
Development Tools By Supplier
OM11039, OM11040, OM11046, OM11048
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
33HVQFN EP
Device Core
ARM Cortex M3
Family Name
LPC1000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4944
935289655551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1343FHN33,551
Manufacturer:
NXP
Quantity:
780
NXP Semiconductors
UM10375
User manual
16.6.1 System Timer Control and status register (CTRL - 0xE000 E010)
16.6.2 System Timer Reload value register (LOAD - 0xE000 E014)
16.6.3 System Timer Current value register (VAL - 0xE000 E018)
The CTRL register contains control information for the System Tick Timer, and provides a
status flag.
Table 267. System Timer Control and status register (CTRL - 0xE000 E010) bit description
The LOAD register is set to the value that will be loaded into the System Tick Timer
whenever it counts down to zero. This register is loaded by software as part of timer
initialization. The CALIB register may be read and used as the value for LOAD if the CPU
or external clock is running at the frequency intended for use with the CALIB value.
Table 268. System Timer Reload value register (LOAD - 0xE000 E014) bit description
The VAL register returns the current count from the System Tick counter when it is read by
software.
Bit
0
1
2
15:3
16
31:17 -
Bit
23:0
31:24
Symbol
ENABLE
TICKINT
CLKSOURCE System Tick clock source selection. When 1, the system clock
-
COUNTFLAG System Tick counter flag. This flag is set when the System Tick
Symbol
RELOAD
-
All information provided in this document is subject to legal disclaimers.
Description
This is the value that is loaded into the System Tick counter when it
counts down to 0.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Description
System Tick counter enable. When 1, the counter is enabled.
When 0, the counter is disabled.
System Tick interrupt enable. When 1, the System Tick interrupt
is enabled. When 0, the System Tick interrupt is disabled. When
enabled, the interrupt is generated when the System Tick counter
counts down to 0.
(CPU) clock is selected. When 0, the output clock from the
system tick clock divider (SYSTICKDIV) is selected as the
reference clock. In this case, the core clock must be at least 2.5
times faster than the reference clock otherwise the count values
are unpredictable.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
counter counts down to 0, and is cleared by reading this register.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Rev. 2 — 7 July 2010
Chapter 16: LPC13xx System tick timer
UM10375
© NXP B.V. 2010. All rights reserved.
Reset
value
0
NA
276 of 333
Reset
value
0
0
0
NA
0
NA

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