ATMEGA16U2-MU Atmel, ATMEGA16U2-MU Datasheet - Page 201

• Manufacturer Part Number: ATMEGA16U2-MU
• Description: MCU AVR 16K FLASH USB 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16U2-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Core: AVR8
• Processor Series: ATMEGA16x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 16 MHz
• Data Ram Size: 1.25 KB
• Data Rom Size: 512 B
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Mounting Style: SMD/SMT
• Height: 0.95 mm
• Interface Type: SPI, UART
• Length: 5 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 5 mm
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

21.10 Remote Wake-up
21.11 STALL request
21.11.1
7799D–AVR–11/10
Special consideration for Control Endpoints
The Remote Wake-up (or upstream resume) request is the only operation allowed to be sent by
the device on its own initiative. Anyway, to do that, the device should first have received a
DEVICE_REMOTE_WAKEUP request from the host.
For each endpoint, the STALL management is performed using 2 bits:
To send a STALL handshake at the next request, the STALLRQ request bit has to be set. All fol-
lowing requests will be handshak’ed with a STALL until the STALLRQC bit is set.
Setting STALLRQC automatically clears the STALLRQ bit. The STALLRQC bit is also immedi-
ately cleared by hardware after being set by software. Thus, the firmware will never read this bit
as set.
Each time the STALL handshake is sent, the STALLEDI flag is set by the USB controller and the
EPINTx interrupt will be triggered (if enabled).
The incoming packets will be discarded (RXOUTI and RWAL will not be set).
The host will then send a command to reset the STALL: the firmware just has to set the STALL-
RQC bit and to reset the endpoint.
A SETUP request is always ACK’ed.
If a STALL request is set for a Control Endpoint and if a SETUP request occurs, the SETUP
request has to be ACK’ed and the STALLRQ request and STALLEDI sent flags are automati-
cally reset (RXSETUPI set, TXIN cleared, STALLED cleared, TXINI cleared...).
This management simplifies the enumeration process management. If a command is not sup-
ported or contains an error, the firmware set the STALL request flag and can return to the main
task, waiting for the next SETUP request.
T h i s f u n c t i o n i s c o m p l i a n t w i t h t h e C h a p t e r 8 test that sen d s extra status for a
GET_DESCRIPTOR. The firmware sets the STALL request just after receiving the status. All
extra status will be automatically STALL’ed until the next SETUP request.
• First, the USB controller must have detected the “suspend” state of the line: the remote
• The firmware has then the ability to set RMWKUP to send the “upstream resume” stream.
• When the controller starts to send the “upstream resume”, the UPRSMI flag is set and
• RMWKUP is automatically cleared by hardware at the end of the “upstream resume”.
• After that, if the controller detects a good “End Of Resume” signal from the host, an EORSMI
wake-up can only be sent if the SUSPI bit is set.
This will automatically be done by the controller after 5ms of inactivity on the USB line.
interrupt is triggered (if enabled). If SUSPI was set, SUSPI is cleared by hardware.
interrupt is triggered (if enabled).
– STALLRQ (enable stall request)
– STALLRQC (disable stall request)
– STALLEDI (stall sent interrupt)
ATmega8U2/16U2/32U2
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