ATMEGA32U4-MUR Atmel, ATMEGA32U4-MUR Datasheet - Page 430
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ATMEGA32U4-MUR
Manufacturer Part Number
ATMEGA32U4-MUR
Description
MCU AVR 16K FLASH 16MHZ 44VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16U4-MU.pdf
(433 pages)
Specifications of ATMEGA32U4-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32U4-MUR
Manufacturer:
UCC
Quantity:
1 001
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ATmega16/32U4
25 JTAG Interface and On-chip Debug System ..................................... 314
26 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 320
27 Boot Loader Support – Read-While-Write Self-Programming ......... 330
28 Memory Programming ......................................................................... 346
24.8ADC Conversion Result ......................................................................................305
24.9ADC Register Description ...................................................................................307
25.1Overview .............................................................................................................314
25.2Test Access Port – TAP ......................................................................................314
25.3TAP Controller .....................................................................................................316
25.4Using the Boundary-scan Chain ..........................................................................317
25.5Using the On-chip Debug System .......................................................................317
25.6On-chip Debug Specific JTAG Instructions .........................................................318
25.7On-chip Debug Related Register in I/O Memory .................................................319
25.8Using the JTAG Programming Capabilities .........................................................319
25.9Bibliography .........................................................................................................319
26.1Features ..............................................................................................................320
26.2System Overview ................................................................................................320
26.3Data Registers .....................................................................................................320
26.4Boundary-scan Specific JTAG Instructions .........................................................322
26.5Boundary-scan Related Register in I/O Memory .................................................323
26.6Boundary-scan Chain ..........................................................................................324
26.7ATmega16U4/ATmega32U4 Boundary-scan Order ............................................327
26.8Boundary-scan Description Language Files ........................................................329
27.1Boot Loader Features ..........................................................................................330
27.2Application and Boot Loader Flash Sections .......................................................330
27.3Read-While-Write and No Read-While-Write Flash Sections ..............................330
27.4Boot Loader Lock Bits .........................................................................................333
27.5Entering the Boot Loader Program ......................................................................334
27.6Addressing the Flash During Self-Programming .................................................337
27.7Self-Programming the Flash ................................................................................338
28.1Program And Data Memory Lock Bits .................................................................346
28.2Fuse Bits .............................................................................................................347
28.3Signature Bytes ...................................................................................................349
28.4Calibration Byte ...................................................................................................349
28.5Parallel Programming Parameters, Pin Mapping, and Commands .....................349
7766F–AVR–11/10
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