D12350F20IV Renesas Electronics America, D12350F20IV Datasheet - Page 324

• Manufacturer Part Number: D12350F20IV
• Description: IC H8S/2350 MCU 4.5/5.5V 0+K I-T
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12350F20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 7 DMA Controller (DMAC)
Figure 7.42 shows an example in which a low level is not output at the TEND pin.
Activation by Falling Edge on DREQ
DREQ pin falling edge detection is performed in synchronization with DMAC internal operations.
The operation is as follows:
[1] Activation request wait state: Waits for detection of a low level on the DREQ pin, and
[2] Transfer wait state: Waits for DMAC data transfer to become possible, and switches to [3].
[3] Activation request disabled state: Waits for detection of a high level on the DREQ pin, and
After DMAC transfer is enabled, a transition is made to [1]. Thus, initial activation after transfer is
enabled is performed by detection of a low level.
Rev. 3.00 Sep 15, 2006 page 288 of 988
REJ09B0330-0300
switches to [2].
switches to [1].
Internal write signal
Internal read signal
External address
Figure 7.42 Example in Which Low Level Is Not Output at TEND
Internal address
HWR, LWR
TEND
DREQ
DREQ
DREQ Pin
External write by CPU, etc.
Not output
DMA
read
DMA
write
TEND
TEND
TEND Pin