D12350F20IV Renesas Electronics America, D12350F20IV Datasheet - Page 511

IC H8S/2350 MCU 4.5/5.5V 0+K I-T

D12350F20IV

Manufacturer Part Number
D12350F20IV
Description
IC H8S/2350 MCU 4.5/5.5V 0+K I-T
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12350F20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
D12350F20IV
Manufacturer:
INF
Quantity:
4 834
10.4.7
In phase counting mode, the phase difference between two external clock inputs is detected and
TCNT is incremented/decremented accordingly. This mode can be set for channels 1, 2, 4, and 5.
When phase counting mode is set, an external clock is selected as the counter input clock and
TCNT operates as an up/down-counter regardless of the setting of bits TPSC2 to TPSC0 and bits
CKEG1 and CKEG0 in TCR. However, the functions of bits CCLR1 and CCLR0 in TCR, and of
TIOR, TIER, and TGR are valid, and input capture/compare match and interrupt functions can be
used.
When overflow occurs while TCNT is counting up, the TCFV flag in TSR is set; when underflow
occurs while TCNT is counting down, the TCFU flag is set.
The TCFD bit in TSR is the count direction flag. Reading the TCFD flag provides an indication of
whether TCNT is counting up or down.
Table 10.8 shows the correspondence between external clock pins and channels.
Table 10.8 Phase Counting Mode Clock Input Pins
Example of Phase Counting Mode Setting Procedure
Figure 10.28 shows an example of the phase counting mode setting procedure.
Channels
When channel 1 or 5 is set to phase counting mode
When channel 2 or 4 is set to phase counting mode
Select phase counting mode
Phase Counting Mode
<Phase counting mode>
Phase counting mode
Figure 10.28 Example of Phase Counting Mode Setting Procedure
Start count
[1]
[2]
[1] Select phase counting mode with bits MD3 to
[2] Set the CST bit in TSTR to 1 to start the count
MD0 in TMDR.
operation.
Section 10 16-Bit Timer Pulse Unit (TPU)
Rev. 3.00 Sep 15, 2006 page 475 of 988
A-Phase
TCLKA
TCLKC
External Clock Pins
B-Phase
TCLKB
TCLKD
REJ09B0330-0300

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