D12350F20IV Renesas Electronics America, D12350F20IV Datasheet - Page 82
D12350F20IV
Manufacturer Part Number
D12350F20IV
Description
IC H8S/2350 MCU 4.5/5.5V 0+K I-T
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12350F20IV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12350F20IV
Manufacturer:
INF
Quantity:
4 834
- Current page: 82 of 1027
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Section 2 CPU
Note:
Rev. 3.00 Sep 15, 2006 page 46 of 988
REJ09B0330-0300
Type
Bit-
manipulation
instructions
* Size refers to the operand size.
B: Byte
Instruction
BSET
BCLR
BNOT
BTST
BAND
BIAND
BOR
BIOR
Size *
B
B
B
B
B
B
B
B
Function
1
Sets a specified bit in a general register or memory
operand to 1. The bit number is specified by 3-bit
immediate data or the lower three bits of a general
register.
0
Clears a specified bit in a general register or memory
operand to 0. The bit number is specified by 3-bit
immediate data or the lower three bits of a general
register.
Inverts a specified bit in a general register or memory
operand. The bit number is specified by 3-bit immediate
data or the lower three bits of a general register.
Tests a specified bit in a general register or memory
operand and sets or clears the Z flag accordingly. The
bit number is specified by 3-bit immediate data or the
lower three bits of a general register.
C
ANDs the carry flag with a specified bit in a general
register or memory operand and stores the result in the
carry flag.
C
ANDs the carry flag with the inverse of a specified bit in
a general register or memory operand and stores the
result in the carry flag.
The bit number is specified by 3-bit immediate data.
C
ORs the carry flag with a specified bit in a general
register or memory operand and stores the result in the
carry flag.
C
ORs the carry flag with the inverse of a specified bit in a
general register or memory operand and stores the
result in the carry flag.
The bit number is specified by 3-bit immediate data.
¬ (<bit-No.> of <EAd>)
¬ (<bit-No.> of <EAd>)
¬ (<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
¬ (<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
Z
C
C
C
C
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