D12350F20IV Renesas Electronics America, D12350F20IV Datasheet - Page 502
D12350F20IV
Manufacturer Part Number
D12350F20IV
Description
IC H8S/2350 MCU 4.5/5.5V 0+K I-T
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12350F20IV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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Section 10 16-Bit Timer Pulse Unit (TPU)
Examples of Buffer Operation
When TGR is an output compare register: Figure 10.19 shows an operation example in which
PWM mode 1 has been designated for channel 0, and buffer operation has been designated for
TGRA and TGRC. The settings used in this example are TCNT clearing by compare match B, 1
output at compare match A, and 0 output at compare match B.
As buffer operation has been set, when compare match A occurs the output changes and the value
in buffer register TGRC is simultaneously transferred to timer general register TGRA. This
operation is repeated each time compare match A occurs.
For details of PWM modes, see section 10.4.6, PWM Modes.
Rev. 3.00 Sep 15, 2006 page 466 of 988
REJ09B0330-0300
TGR0B
TGR0A
H'0000
TGR0C
TGR0A
TIOCA
TCNT value
Transfer
H'0200
H'0200
Figure 10.19 Example of Buffer Operation (1)
H'0200
H'0450
H'0450
H'0450
H'0520
H'0520
Time
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