D12350F20IV Renesas Electronics America, D12350F20IV Datasheet - Page 719
D12350F20IV
Manufacturer Part Number
D12350F20IV
Description
IC H8S/2350 MCU 4.5/5.5V 0+K I-T
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12350F20IV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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Manufacturer
Quantity
Price
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D12350F20IV
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19.4
When the oscillator frequency is 5 MHz or higher, the duty adjustment circuit adjusts the duty
cycle of the clock signal from the oscillator to generate the system clock ( ).
19.5
The medium-speed clock divider divides the system clock to generate /2, /4, /8, /16, and /32.
19.6
The bus master clock selection circuit selects the system clock ( ) or one of the medium-speed
clocks ( /2, /4, or /8, /16, and /32) to be supplied to the bus master, according to the settings
of the SCK2 to SCK0 bits in SCKCR.
Duty Adjustment Circuit
Medium-Speed Clock Divider
Bus Master Clock Selection Circuit
Rev. 3.00 Sep 15, 2006 page 683 of 988
Section 19 Clock Pulse Generator
REJ09B0330-0300
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