D12350F20IV Renesas Electronics America, D12350F20IV Datasheet - Page 466

• Manufacturer Part Number: D12350F20IV
• Description: IC H8S/2350 MCU 4.5/5.5V 0+K I-T
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12350F20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
Channel
1
Legend: *: Don’t care
Channel
2
Legend: *: Don’t care
Rev. 3.00 Sep 15, 2006 page 430 of 988
REJ09B0330-0300
Bit 7
IOB3
0
1
Bit 7
IOB3
0
1
Bit 6
IOB2
0
1
0
1
Bit 6
IOB2
0
1
*
Bit 5
IOB1
0
1
0
1
0
1
*
Bit 5
IOB1
0
1
0
1
0
1
Bit 4
IOB0 Description
0
1
0
1
0
1
0
1
0
1
*
*
Bit 4
IOB0 Description
0
1
0
1
0
1
0
1
0
1
*
TGR1B
is output
compare
register
TGR1B
is input
capture
register
TGR2B
is output
compare
register
TGR2B
is input
capture
register
Output disabled
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCB1 pin
Capture input
source is TGR0C
compare match/
input capture
Output disabled
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCB2 pin
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Toggle output at compare
match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at generation of
TGR0C compare match/input
capture
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Toggle output at compare
match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
(Initial value)
(Initial value)