D12350F20IV Renesas Electronics America, D12350F20IV Datasheet - Page 95
D12350F20IV
Manufacturer Part Number
D12350F20IV
Description
IC H8S/2350 MCU 4.5/5.5V 0+K I-T
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12350F20IV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Price
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2.8
2.8.1
The CPU has five main processing states: the reset state, exception handling state, program
execution state, bus-released state, and power-down state. Figure 2.14 shows a diagram of the
processing states. Figure 2.15 indicates the state transitions.
Note: * The power-down state also includes a medium-speed mode, module stop mode etc.
Processing
states
Processing States
Overview
Exception-handling
Program execution
Bus-released state
Power-down state
The CPU and all on-chip supporting modules have been
initialized and are stopped.
A transient state in which the CPU changes the normal
processing flow in response to a reset, interrupt, or trap
instruction.
The CPU executes program instructions in sequence.
The external bus has been released in response to a bus
request signal from a bus master other than the CPU.
CPU operation is stopped
to conserve power.*
Figure 2.14 Processing States
Reset state
state
state
Rev. 3.00 Sep 15, 2006 page 59 of 988
Hardware standby
Software standby
Sleep mode
mode
mode
REJ09B0330-0300
Section 2 CPU
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