HD6417727F100C Renesas Electronics America, HD6417727F100C Datasheet - Page 402

• Manufacturer Part Number: HD6417727F100C
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100C

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 12 Bus State Controller (BSC)
refresh mode to the start of auto-refreshing takes time, this time should be taken into consideration
when setting the initial value of RTCNT. Making the RTCNT value 1 less than the RTCOR value
will enable refreshing to be started immediately.
After self-refreshing has been set, the self-refresh state continues even if the chip standby state is
entered using this LSI's standby function, and is maintained even after recovery from standby
mode other than through a power-on reset. In case of a power-on reset, the bus state controller's
registers are initialized, and therefore the self-refresh state is cleared.
Self-refreshing is performed in normal operation, in sleep mode, in standby mode, and in case of a
manual reset. In addition, halt USB and LCDC before entering standby mode.
When the synchronous DRAM is used, self-refreshing is initiated in the following procedure.
1. Clear the refresh control bit to 0.
2. Write H'00 to RTCNT
3. Set the refresh control bit and refresh mode bit to 1.
Rev.6.00 Mar. 27, 2009 Page 344 of 1036
REJ09B0254-0600
CKIO, CKIO2
RD/WR
CKE
RAS
CAS
CSn
Figure 12.20 Synchronous DRAM Self-Refresh Timing
Tp
TRs1
(TRs2)
(TRs2)
TRs3
(Tpc)
(Tpc)