HD6417727F100C Renesas Electronics America, HD6417727F100C Datasheet - Page 819

• Manufacturer Part Number: HD6417727F100C
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100C

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Explanation of Terms
• SE0: USB data transfer uses a D+/D– differential signal. Consequently, D+/D– is normally a
• Device not connected detection: Detection of a USB device not connected state when SE0
24.8
1. Phenomenon
Notes: 1. In FullSpeed, D+ = Low and D- = High. In LowSpeed, D+ = High and D- = Low.
2. Conditions when the above phenomenon occurs
3. Conditions when the above phenomenon does not occur
4. Workaround by software
reciprocal signal. However, in some special cases D+ and D– are both defined as low. This
state is referred to as SE0.
continues beyond the device not connected detection duration.
While the USB host is providing an output of a Resume *
is turned off or that (b) OverCurrent is produced. In this case, the Resume signal should
ordinarily be stopped so that the idle *
is that an idle signal is output.
While a Resume *
produced.
The above phenomenon will not occur if there is no Resume operation, that is, Suspend
operation has not been done.
If the above phenomenon occurs, Resume is interrupted and then an idle signal is output.
However, turning on PortPower enables device recognition. The above phenomenon is
removed by the subsequent Port Reset for the device. Normal operation is thus recovered.
Note, however, the above phenomenon will not be removed by USB Reset, which is generated
by the HCFS1 and HCFS0 bits in the HcControl (USBHC) register. For this reason, if you are
using software that issues USB Reset by the HCFS1 and HCFS0 bits in the HcControl
(USBHC) register, modify the software so that it issues Port Reset by setting the PRS bit in the
HcRhPortStatus1 or HcRhPortStatus2 (USBHRPS1 or USBHRPS2) register. However, there
is no need to take corrective action if Port Reset has already been issued by the PRS bit before
the recognition of USB device connection.
Note: The prohibition on consecutive 0 bits applies to all bits of SYNC + PID + DATA +
2. In FullSpeed, D+ = High and D- = Low. In LowSpeed, D+ = Low and D- = High.
Usage Notes of Resume Operation of USB Host Controller (USBH)
CRC16 + EOP. EOP is counted as 2 bits.
1
signal is being output, (a) PortPower is turned off or (b) OverCurrent is
2
state will be established. Actually, however, the result
Rev.6.00 Mar. 27, 2009 Page 761 of 1036
1
signal, suppose that (a) PortPower
Section 24 USB HOST Module
REJ09B0254-0600