HD6417727F100C Renesas Electronics America, HD6417727F100C Datasheet - Page 798

• Manufacturer Part Number: HD6417727F100C
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100C

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 24 USB HOST Module
Register: HcInterruptDisable
Bits
0
24.2.7
HCCA Register (H'04000418)
The HcHCCA register includes physical addresses of the host controller communication area. The
host controller driver determines the alignment limitation by writing 1 to all bits in the HcHCCA
register and by reading the content of the HcHCCA register. Alignment is evaluated by checking
the number of 0 in the lower bits. The minimum alignment is 256 bytes. Consequently, bits 0 to 7
must be always returned to 0 when they are read. This area is used to retain the control structure
and interrupt table that are accessed by the host controller and host controller driver.
Register: HcHCCA
Bits
31–8
7–0
24.2.8
HcPeriodCurrentED Register (H'0400041C)
The HcPeriodCurrentED register includes a physical address of current Isochronous ED or
Interrupt ED.
Register: HcPeriodCurrentED
Bits
31–4
3–0
Rev.6.00 Mar. 27, 2009 Page 740 of 1036
REJ09B0254-0600
HcHCCA
HcPeriodCurrentED
Reset
0b
Reset
0h
0h
Reset
0h
0h
R/W
R/W
R/W
R/W
—
R/W
R/W
—
Offset: 14–17
Description
SchedulingOverrunEnable (SO)
0: Ignore
1: Disable interrupt generation due to Scheduling Overrun.
Offset: 18–1B
Description
HCCA
Reserved.
Offset: 1C–1F
Description
PeriodCurrentED (PCED)
Pointer to the current Periodic List ED. (Within memory area3)
Reserved.