HD6417727F100C Renesas Electronics America, HD6417727F100C Datasheet - Page 90

• Manufacturer Part Number: HD6417727F100C
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100C

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 2 CPU
When data is read into the upper 16 bits of a register (bits 31 to 16), the lower 16 bits of the
register (bits 15 to 0) are automatically cleared. A0 and A1 can be stored to the X or Y memory by
this operation, but other registers cannot be stored.
There are some rules to access SR by STC/LDC instruction.
1. When DSP is disabled, same as SH-3 behavior
2. When SDP supervisor mode, same as supervisor mode
3. In User DSP mode, SR can be read by STC instruction
4. In User DSP mode, LDC to SR is allowed but no DSP related bits are protected from write.
Table 2.2 shows detail behavior under each SH3-DSP mode.
Rev.6.00 Mar. 27, 2009 Page 32 of 1036
REJ09B0254-0600