UPD78F9200MA-CAC-A Renesas Electronics America, UPD78F9200MA-CAC-A Datasheet - Page 129

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UPD78F9200MA-CAC-A

Manufacturer Part Number
UPD78F9200MA-CAC-A
Description
MCU 8BIT 1KB FLASH 128B RAM
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9200MA-CAC-A

Package / Case
*
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
7
Core Processor
78K0S
Program Memory Type
FLASH
Ram Size
128 x 8
Program Memory Size
1KB (1K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F9200MA-CAC-A
Manufacturer:
NEC
Quantity:
20 000
(15) Capture operation
(16) Compare operation
<1> If the valid edge of the TI000 pin is to be set as the count clock, do not set the clear/start mode and the
<2> When the CRC001 bit value is 1, capture is not performed in the CR000 register if both the rising and
<3> When the CRC001 bit value is 1, the TM00 count value is not captured in the CR000 register when a
<4> To ensure the reliability of the capture operation, the capture trigger requires a pulse longer than two
<5> The capture operation is performed at the fall of the count clock. A interrupt request input (INTTM0n0),
<6> To use two capture registers, set the TI000 and TI010 pins.
Remark n = 0, 1
The capture operation may not be performed for CR0n0 set in compare mode even if a capture trigger is input.
Remark n = 0, 1
capture trigger at the valid edge of the TI000 pin.
falling edges have been selected as the valid edges of the TI000 pin.
valid edge of the TI010 pin is detected, but the input from the TI010 pin can be used as an external
interrupt source because INTTM000 is generated at that timing.
cycles of the count clock selected by prescaler mode register 00 (PRM00).
however, occurs at the rise of the next count clock.
CR010 capture value
Capture read signal
TM00 count value
Count clock
Edge input
INTTM010
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00 ( PD78F920x ONLY)
Figure 6-39. Capture Register Data Retention Timing
N
User’s Manual U18172EJ3V0UD
X
N + 1
Capture
N + 2
N + 2
M
Capture, but
read value is
not guaranteed
M + 1
M + 1
M + 2
127

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