UPD78F9200MA-CAC-A Renesas Electronics America, UPD78F9200MA-CAC-A Datasheet - Page 190

• Manufacturer Part Number: UPD78F9200MA-CAC-A
• Description: MCU 8BIT 1KB FLASH 128B RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9200MA-CAC-A

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 7
• Core Processor: 78K0S
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Program Memory Size: 1KB (1K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

<R>
11.1.2 Registers used during standby ( PD78F920x only)
select register (OSTS).
Address: FFF4H, After reset: Undefined, R/W
188
Symbol
OSTS
The oscillation stabilization time after the standby mode is released is controlled by the oscillation stabilization time
Remark For the registers that start, stop, or select the clock, see CHAPTER 5 CLOCK GENERATORS.
(1) Oscillation stabilization time select register (OSTS) ( PD78F920x only)
This register is used to select oscillation stabilization time of the clock supplied from the oscillator when the
STOP mode is released. The wait time set by OSTS is valid only when the crystal/ceramic oscillation clock is
selected as the system clock and after the STOP mode is released. If the high-speed internal oscillation or
external clock input is selected as the system clock source, no wait time elapses.
The system clock oscillator and the oscillation stabilization time that elapses after power application or release
of reset are selected by the option byte. For details, refer to CHAPTER 15 OPTION BYTE.
OSTS is set by using the 8-bit memory manipulation instruction.
Figure 11-1. Format of Oscillation Stabilization Time Select Register (OSTS) ( PD78F920x Only)
Cautions 1. To set and then release the STOP mode, set the oscillation stabilization time as follows.
Remarks 1. ( ): f
OSTS1
0
0
1
1
7
0
2. The wait time after the STOP mode is released does not include the time from the
3. The oscillation stabilization time that elapses on power application or after release of
2. Determine the oscillation stabilization time of the resonator by checking the characteristics of
the resonator to be used.
Expected oscillation stabilization time of resonator
by OSTS
release of the STOP mode to the start of clock oscillation (“a” in the figure below),
regardless of whether STOP mode was released by reset signal generation or interrupt
generation.
reset is selected by the option byte. For details, refer to CHAPTER 15 OPTION BYTE.
OSTS0
X
= 10 MHz
6
0
0
1
0
1
2
2
2
2
10
12
15
17
waveform
/f
/f
/f
/f
of X1 pin
X
X
X
X
Voltage
CHAPTER 11 STANDBY FUNCTION
(102.4 s)
(409.6 s)
(3.27 ms)
(13.1 ms)
5
0
STOP mode is released
User’s Manual U18172EJ3V0UD
4
0
a
Selection of oscillation stabilization time
3
0
Oscillation stabilization time set
2
0
OSTS1
1
OSTS0
0