UPD78F9200MA-CAC-A Renesas Electronics America, UPD78F9200MA-CAC-A Datasheet - Page 335

• Manufacturer Part Number: UPD78F9200MA-CAC-A
• Description: MCU 8BIT 1KB FLASH 128B RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9200MA-CAC-A

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 7
• Core Processor: 78K0S
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Program Memory Size: 1KB (1K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

Low-
voltage
detector
Option
byte
Function
Cautions for
low-voltage
detector
Oscillation
stabilization
time on power
application or
after reset
release
(
Control of
RESET pin
(
Control of
RESET pin
(
Selection of
system clock
source
(
Selection of
system clock
source
(
Low-speed
internal
oscillates
μ
μ
μ
μ
μ
PD78F920x)
PD78F920x)
PD78F950x)
PD78F920x)
PD78F950x)
Details of
Function
The system may be repeatedly reset and released from the reset status.
In this case, the time from release of reset to the start of the operation of the
microcontroller can be arbitrarily set by taking action (1) below.
In a system where the supply voltage (V
vicinity of the LVI detection voltage (V
on how the low-voltage detector is used.
<1> When used as reset
<2> When used as interrupt
Interrupt requests may be frequently generated. Take (b) of action (2) below.
The setting of this option is valid only when the crystal/ceramic oscillation clock is
selected as the system clock source. No wait time elapses if the high-speed
internal oscillation clock or external clock input is selected as the system clock
source.
Because the option byte is referenced after reset release, if a low level is input to
the RESET pin before the option byte is referenced, then the reset state is not
released.
Also, when setting 0 to RMCE, connect the pull-up resistor.
Because the option byte is referenced after reset release, if a low level is input to
the RESET pin before the option byte is referenced, then the reset state is not
released.
When used as an input-only port (P34), the setting of the on-chip pull-up resistor
can be done by PU34 on PU3 register.
Because the X1 and X2 pins are also used as the P23/ANI3 and P22/ANI2 pins,
the conditions under which the X1 and X2 pins can be used differ depending on
the selected system clock source.
(1) Crystal/ceramic oscillation clock is selected
The X1 and X2 pins cannot be used as I/O port pins or analog input pins of A/D
converter because they are used as clock input pins.
(2) External clock input is selected
Because the X1 pin is used as an external clock input pin, P121 cannot be used
as an I/O port pin or an analog input pin of A/D converter.
(3) High-speed internal oscillation clock is selected
P23/ANI3 and P22/ANI2 pins can be used as I/O port pins or analog input pins of
A/D converter.
Because the EXCLK pin is also used as the P23 pin, the condition under which
the EXCLK pin can be used differ depending on the selected system clock
source.
(1) External clock input is selected
Because the pin is used as an external clock input pin, P23 cannot be used as an
I/O port pin.
(2) High-speed internal oscillation clock is selected
P23 pin can be used as an I/O port pin.
If it is selected that low-speed internal oscillator cannot be stopped, the count
clock to the watchdog timer (WDT) is fixed to low-speed internal oscillation clock.
APPENDIX D LIST OF CAUTIONS
User’s Manual U18172EJ3V0UD
Cautions
LVI
), the operation is as follows depending
DD
) fluctuates for a certain period in the
p. 215
p. 220
p. 220
p. 222
p. 220
p. 222
pp. 221,
223
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