UPD78F9200MA-CAC-A Renesas Electronics America, UPD78F9200MA-CAC-A Datasheet - Page 324

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UPD78F9200MA-CAC-A

Manufacturer Part Number
UPD78F9200MA-CAC-A
Description
MCU 8BIT 1KB FLASH 128B RAM
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9200MA-CAC-A

Package / Case
*
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
7
Core Processor
78K0S
Program Memory Type
FLASH
Ram Size
128 x 8
Program Memory Size
1KB (1K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F9200MA-CAC-A
Manufacturer:
NEC
Quantity:
20 000
322
This appendix lists cautions described in this document.
“Classification (hard/soft)” in table is as follows.
Hard:
Soft:
Pin
functions
Memory
space
Port
functions
Function
Cautions for microcontroller internal/external hardware
Cautions for software such as register settings or programs
P22/X2/ANI2,
P23/X1/ANI3
(
P22,
P23/EXCLK,
P34/RESET
(
SP: stack
pointer
P22/X2/ANI2,
P23/X1/ANI3
(
P22,
P23/EXCLK,
P34/RESET
(
P34
(
P34
(
μ
μ
μ
μ
μ
μ
PD78F920x)
PD78F950x)
PD78F920x)
PD78F950x)
PD78F920x)
PD78F950x)
Details of
Function
The P22/X2/ANI2, P23/X1/ANI3 pins are pulled down during reset.
The P22 and P23/EXCLK pins are pulled down during reset. The P34/RESET
pin is pulled up during reset by the reset pin function/power-on clear circuit.
Since reset signal generation makes the SP contents undefined, be sure to
initialize the SP before using the stack memory.
Stack pointers can be set only to the high-speed RAM area, and only the lower
10 bits can be actually set.
0FF00H is in the SFR area, not the high-speed RAM area, so it was converted
to 0FB00H that is in the high-speed RAM area. When the value is actually
pushed onto the stack, 1 is subtracted from 0FB00H to become 0FAFFH, but
that value is not in the high-speed RAM area, so it is converted to 0FEFFH,
which is the same value as when 0FF00H is set to the stack pointer.
The P22/X2/ANI2, P23/X1/ANI3 pins are pulled down during reset.
The P22 and P23/EXCLK pins are pulled down during reset. The P34/RESET
pin is pulled up during reset by the reset pin function/power-on clear circuit.
Because the P34 pin functions alternately as the RESET pin, if it is used as an
input port pin, the function to input an external reset signal to the RESET pin
cannot be used. The function of the port is selected by the option byte. For
details, refer to CHAPTER 15 OPTION BYTE.
Also, since the option byte is referenced after the reset release, if low level is
input to the RESET pin before the referencing, then the reset state is not
released. When it is used as an input port pin, connect the pull-up resistor.
Because the P34 pin functions alternately as the RESET pin, if it is used as an
input port pin, the function to input an external reset signal to the RESET pin
cannot be used. The function of the port is selected by the option byte. For
details, refer to CHAPTER 15 OPTION BYTE.
Also, since the option byte is referenced after the reset release, if low level is
input to the RESET pin before the referencing, then the reset state is not
released. When it is used as an input port pin, connect an on-chip pull-up
resistor by using bit 4 (PU34) of pull-up resistor option register 3 (PU3).
APPENDIX D LIST OF CAUTIONS
User’s Manual U18172EJ3V0UD
Cautions
22, 24, 25
pp. 23
24, 25, 26
pp. 21,
p. 38
p. 38
p. 54
p. 55
p. 65
p. 65
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