UPD78F9200MA-CAC-A Renesas Electronics America, UPD78F9200MA-CAC-A Datasheet - Page 158
UPD78F9200MA-CAC-A
Manufacturer Part Number
UPD78F9200MA-CAC-A
Description
MCU 8BIT 1KB FLASH 128B RAM
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9200MA-CAC-A.pdf
(342 pages)
Specifications of UPD78F9200MA-CAC-A
Package / Case
*
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
7
Core Processor
78K0S
Program Memory Type
FLASH
Ram Size
128 x 8
Program Memory Size
1KB (1K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F9200MA-CAC-A
Manufacturer:
NEC
Quantity:
20 000
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<R>
(2) When the watchdog timer operation clock is the low-speed internal oscillation clock (f
8.4.4
the watchdog timer is the system clock (f
counting is started again using the operation clock before the operation was stopped. At this time, the counter is not
cleared to 0 but holds its value.
156
The watchdog timer stops counting during HALT instruction execution regardless of whether the operation clock of
instruction is executed
When the STOP instruction is executed, operation of the watchdog timer is stopped. After STOP mode is
released, operation stops for 34
operation was stopped. At this time, the counter is not cleared to 0 but holds its value.
Watchdog timer
Figure 8-7. Operation in STOP Mode (WDT Operation Clock: Low-Speed Internal Oscillation Clock)
CPU operation
Note The operation stop time is 17 s (MIN.), 34 s (TYP.), and 67 s (MAX.).
Watchdog timer operation in HALT mode (when “low-speed internal oscillator can be stopped by
software” is selected by option byte)
CPU operation
Watchdog timer
Watchdog timer
f
CPU operation
CPU
f
RL
f
X
<2> CPU clock: High-speed internal oscillation clock or external clock input
or f
Operating
operation
f
CPU
Normal
RL
<1> CPU clock: Crystal/ceramic oscillation clock ( PD78F920x Only)
Normal operation
f
CPU
f
RL
Operating
Operating
operation
Normal
STOP
Oscillation stopped
Operation stopped
Operation stopped
s
Figure 8-8. Operation in HALT Mode
(
TYP.
X
HALT
) or low-speed internal oscillation clock (f
CHAPTER 8 WATCHDOG TIMER
STOP
stopped
Operation
Oscillation stopped
) and then counting is started again using the operation clock before the
Operation stopped
User’s Manual U18172EJ3V0UD
Note
stopped
Operation
Oscillation stabilization time
Oscillation stabilization time
(set by OSTS register)
Note
Operating
Normal operation
Operating
Normal operation
Operating
RL
). After HALT mode is released,
Normal operation
RL
) when the STOP
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