UPD78F9200MA-CAC-A Renesas Electronics America, UPD78F9200MA-CAC-A Datasheet - Page 34

• Manufacturer Part Number: UPD78F9200MA-CAC-A
• Description: MCU 8BIT 1KB FLASH 128B RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9200MA-CAC-A

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 7
• Core Processor: 78K0S
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Program Memory Size: 1KB (1K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

<R>
<R>
3.1.1 Internal program memory space
program counter (PC).
32
0000H
0006H
0008H
000AH
Note
The internal program memory space stores programs and table data. This space is usually addressed by the
The 78K0S/KU1+ provide the following internal ROMs (or flash memory) containing the following capacities.
The following areas are allocated to the internal program memory space.
(1)
(2)
(3)
(4)
Vector Table Address
Vector table area
The 20-byte area of addresses 0000H to 0013H is reserved as a vector table area. This area stores program
start addresses to be used when branching by RESET or interrupt request generation.
16-bit address, the lower 8 bits are stored in an even address, and the higher 8 bits are stored in an odd
address.
CALLT instruction table area
The subroutine entry address of a 1-byte call instruction (CALLT) can be stored in the 64-byte area of
addresses 0040H to 007FH.
Option byte area
The option byte area is the 1-byte area of address 0080H. For details, refer to CHAPTER 15 OPTION
BYTE.
Protect byte area
The protect byte area is the 1-byte area of address 0081H. For details, refer to CHAPTER 16 FLASH
MEMORY.
PD78F920x only
PD78F9200, 78F9500
PD78F9201, 78F9501
PD78F9202, 78F9502
Part Number
Reset
INTLVI
INTP0
INTP1
Interrupt Request
Table 3-1. Internal ROM Capacity
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U18172EJ3V0UD
Table 3-2. Vector Table
Flash memory
Structure
000CH
000EH
0010H
0012H
Vector Table Address
Internal ROM
1,024
2,048
4,096
8 bits
8 bits
8 bits
Capacity
INTTMH1
INTTM000
INTTM010
INTAD
Interrupt Request
Note
Note
Note
Of a