UPD78F9200MA-CAC-A Renesas Electronics America, UPD78F9200MA-CAC-A Datasheet - Page 269

• Manufacturer Part Number: UPD78F9200MA-CAC-A
• Description: MCU 8BIT 1KB FLASH 128B RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9200MA-CAC-A

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 7
• Core Processor: 78K0S
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Program Memory Size: 1KB (1K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

An example of a program when the command execution time (from write to internal verify) should be minimized in
self programming mode is shown below.
;---------------------------------------------------------------------
;START
;---------------------------------------------------------------------
ModeOnLoop:
FlashWrite:
FlashWriteLoop:
MOV
MOV
DI
MOV
MOV
MOV
MOV
MOV
NOP
HALT
BT PFS.0,$ModeOnLoop
MOVW
MOVW
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
HALT
MOV
CMP
BNZ
INCW
MOVW
CMPW
BNC
MK0,#11111111B
FLCMD,#00H
PFS,#00H
PFCMD,#0A5H
FLPMC,#01H
FLPMC,#0FEH
FLPMC,#01H
HL,#DataAdrTop
DE,#WriteAdr
FLCMD,#05H
A,D
FLAPH,A
A,E
FLAPL,A
A,[HL]
FLW,A
WDTE,#0ACH
A,PFS
A,#00H
$StatusError
HL
AX,HL
AX,#DataAdrBtm
$FlashVerify
; Masks all interrupts
; Clears FLCMD register
; Configure settings so that the CPU clock ≥ 1 MHz
; Clears flash status register
; PFCMD register control
; FLPMC register control (sets value)
; FLPMC register control (inverts set value)
; Sets self programming mode with FLPMC register control
; (sets value)
; Checks completion of write to specific registers
; Repeats the same processing when an error occurs.
; Sets address at which data to be written is located
; Sets address at which data is to be written
; Sets flash control command (byte write)
; Sets address at which data is to be written
; Sets address at which data is to be written
; Sets data to be written
; Clears & restarts WDT
; Self programming is started
; Checks write error
; Performs abnormal termination processing when an error
; occurs.
; address at which data to be written is located + 1
; Performs internal verify processing
; if write of all data is completed
CHAPTER 16 FLASH MEMORY
User’s Manual U18172EJ3V0UD
267